A continuous-time linear equalizer (CTLE) having a common-source amplifier configured to receive an input signal and output an output signal in accordance with a biasing current; a current source controlled by a first bias voltage and configured to output the biasing current; an active load controlled by a second bias voltage and configured to be a load of the common-source amplifier; a common-mode sensing circuit configured to sense a common-mode voltage of the output signal; a current source controller configured to output the first bias voltage in accordance with the common-mode voltage and a reference voltage derived from a supply voltage of the active load and a first reference current; and an active load controller configured to output the second bias voltage in accordance with the supply voltage of the active load and a second reference current.