Systems, devices, and methods related to a sample rate converter (SRC) for implementing a rate conversion R are provided. The SRC receives input samples at an input rate F.sub.in and outputs samples at an output rate F.sub.out=F.sub.in×R, where R is a fractional value greater than 1. The SRC includes a plurality of filters to process the received input samples and a multiplier-adder block to generate the output samples based on respective delta values and outputs of the plurality of filters. The SRC further includes a plurality of buffers to buffer samples between the plurality of filters and the multiplier-adder block based at least in part on N buffer read pointers, where N is an integer greater than 1. The SRC further includes resampler control circuitry to generate N delta values of the delta values and the N buffer read pointers in parallel based on R.

An apparatus and method are disclosed for processing an audio signal. The apparatus includes an input interface, a digital filterbank having an analysis part and a synthesis part, a first phase shifter, a spectral envelope adjuster, a second phase shifter, and an output interface. The first phase shifter and the second phase shifter reduce a complexity of the digital filterbank, which includes both analysis and synthesis filters that are complex-exponential modulated versions of a prototype filter.

An oversampling channelizer for processing overlapping data that includes a data storage unit, coupled to a data line that receives data values. The data storage unit includes a plurality of lanes, wherein each of the plurality of lanes includes dedicated memory locations and wires that store and transmit data values for a data vector of a data frame, and that store and transmit additional data values for a subsequent data vector of a subsequent data frame that includes a plurality of the data values from the data vector in the data frame. The oversampling channelizer includes a coefficient storage unit that stores a plurality of coefficient vectors for a plurality of coefficient frames. The oversampling channelizer includes a computation unit that computes a dot product of the data values for the data vectors of the data frame with coefficient values for coefficient vectors of a coefficient frame selected by a coefficient storage unit.

A polyphase decimation FIR filter apparatus including a modulo integrator circuit configured to integrate input samples and to provide integrated input samples; and a polyphase FIR filter circuit configured to process the integrated input samples, the polyphase FIR filter circuit including a plurality of multiplier accumulator circuits, each configured to accumulate products of coefficients and respective integrated signal samples, wherein each of the multiplier accumulator circuits receives a subset of FIR filter coefficients, wherein the FIR filter coefficients are derived as the nth difference of original filter coefficients, where n is a number of integrators in the integrator circuit, and wherein the FIR filter circuit is configured to perform computation operations with modulo arithmetic.

An apparatus and method are disclosed for processing an audio signal. The apparatus includes an input interface, a digital filterbank having an analysis part and a synthesis part, a first phase shifter, a spectral envelope adjuster, a second phase shifter, and an output interface. The first phase shifter and the second phase shifter reduce a complexity of the digital filterbank, which includes both analysis and synthesis filters that are complex-exponential modulated versions of a prototype filter.

A method, a computer-readable medium, and an apparatus for resampling audio signal are provided. The apparatus resamples the audio signal in order to preserve the audio playback quality when dealing with audio playback overrun and underrun problem. The apparatus may receive a data block of the audio signal including a first number of samples. For each sample of the first number of samples, the apparatus may slice a portion of the audio signal corresponding to the sample into a particular number of sub-samples. The apparatus may resample the data block of the audio signal into a second number of samples based on the first number of samples and the particular number of sub-samples associated with each sample of the first number of samples. The apparatus may play back the resampled data block of the audio signal via an electroacoustic device.

Systems and methods for direct signal down-conversion and decimation in a digital receiver. The digital receiver produces a decimated passband version of the signal without the problems associated with use of digital mixers. The digital receiver includes a passband-to-passband decimator/down-converter that implements an algorithm which takes the signal band (frequency and bandwidth or lower and upper frequencies) where a signal is present and produces a decimation rate and phase for use by a low-pass mixer-free down-conversion. The digital receiver technology may be efficiently implemented on a digital signal processor or field-programmable gate array.

A method generates a delayed signal based on an input signal, and applies vector magnitude scaling to the delayed signal, generating one or more vector magnitude scaled signals. The input signal is added to the one or more vector magnitude scaled signals, generating one or more phase-shifted signals. Compensation scaling is applied to the one or more phase-shifted signals, generating one or more compensated signals. The input signal and the one or more compensated signals are combined, generating an interpolated output signal. The method may be implemented by a device or a system.

Systems and methods for direct signal down-conversion and decimation in a digital receiver. The digital receiver produces a decimated passband version of the signal without the problems associated with use of digital mixers. The digital receiver includes a passband-to-passband decimator/down-converter that implements an algorithm which takes the signal band (frequency and bandwidth or lower and upper frequencies) where a signal is present and produces a decimation rate and phase for use by a low-pass mixer-free down-conversion. The digital receiver technology may be efficiently implemented on a digital signal processor or field-programmable gate array.

Disclosed are an audio rate conversion system and an electronic apparatus. The audio rate conversion system includes an integrator-comb filter, a multi-rate filter and a first half-band filter, an input of the integrator-comb filter being accessed with digital audio data, an output of the integrator-comb filter being sequentially connected to the multi-rate filter and the first half-band filter; where, the integrator-comb filter is configured to reduce a rate of the digital audio data according to a preset decimation rate; the multi-rate filter is configured to convert a rate of digital audio data output by the integrator-comb filter into a rate of digital audio data corresponding to an accessed control signal according to the control signal; and the first half-band filter is configured to reduce a rate of digital audio data output by the multi-rate filter.