Various embodiments of the invention relate to attenuators with reduced temperature variation. By coordinating first-order resistance temperature (FORT) coefficients of resistors, embodiments of attenuator or attenuator cells are capable of achieving desired attenuation with reduced or minimized temperature variation. Such achievements in reducing temperature variation may be obtained without relying on resistors with large negative FORT coefficients. Attenuator cells may be configured as T-type attenuator cells, π-type attenuator cells, bridged-T attenuator cells, or shunt attenuators with various FORT coefficient combinations for the resistors incorporated within the attenuator cells. Furthermore, various attenuator cells may be cascaded together into a digital step attenuator with the temperature variation of those cells compensating or offsetting each other for an overall minimum temperature variation.

Various embodiments of the invention relate to attenuators with reduced temperature variation. By coordinating first-order resistance temperature (FORT) coefficients of resistors, embodiments of attenuator or attenuator cells are capable of achieving desired attenuation with reduced or minimized temperature variation. Such achievements in reducing temperature variation may be obtained without relying on resistors with large negative FORT coefficients. Attenuator cells may be configured as T-type attenuator cells, π-type attenuator cells, bridged-T attenuator cells, or shunt attenuators with various FORT coefficient combinations for the resistors incorporated within the attenuator cells. Furthermore, various attenuator cells may be cascaded together into a digital step attenuator with the temperature variation of those cells compensating or offsetting each other for an overall minimum temperature variation.

Circuits and methods for eliminating or mitigating the amount of temperature-dependent variation in the relative attenuation of a multi-valued digital step attenuator (DSA) by using resistive components having temperature-dependent resistance values that compensate for or offset changes in the temperature-dependent ON resistance (R.sub.ON) of the switches within the DSA. In some embodiments, DSA attenuator cell switches are fabricated to have positive first-order resistance temperature (FORT) coefficients, while temperature-compensating series attenuation resistances are fabricated as a positive FORT coefficient resistor and temperature-compensating shunt resistances are fabricated as either a negative FORT coefficient resistor or a combination of a negative FORT coefficient resistor in parallel with a positive FORT coefficient resistor.

Circuits and methods for eliminating or mitigating the amount of temperature-dependent variation in the relative attenuation of a multi-valued digital step attenuator (DSA) by using resistive components having temperature-dependent resistance values that compensate for or offset changes in the temperature-dependent ON resistance (R.sub.ON) of the switches within the DSA. In some embodiments, DSA attenuator cell switches are fabricated to have positive first-order resistance temperature (FORT) coefficients, while temperature-compensating series attenuation resistances are fabricated as a positive FORT coefficient resistor and temperature-compensating shunt resistances are fabricated as either a negative FORT coefficient resistor or a combination of a negative FORT coefficient resistor in parallel with a positive FORT coefficient resistor.

Circuits and methods for eliminating or mitigating the amount of temperature-dependent variation in the relative attenuation of a multi-valued digital step attenuator (DSA) by using resistive components having temperature-dependent resistance values that compensate for or offset changes in the temperature-dependent ON resistance (R.sub.ON) of the switches within the DSA. In some embodiments, DSA attenuator cell switches are fabricated to have positive first-order resistance temperature (FORT) coefficients, while temperature-compensating series attenuation resistances are fabricated as a positive FORT coefficient resistor and temperature-compensating shunt resistances are fabricated as either a negative FORT coefficient resistor or a combination of a negative FORT coefficient resistor in parallel with a positive FORT coefficient resistor.

Circuits and methods for eliminating or mitigating the amount of temperature-dependent variation in the relative attenuation of a multi-valued digital step attenuator (DSA) by using resistive components having temperature-dependent resistance values that compensate for or offset changes in the temperature-dependent ON resistance (R.sub.ON) of the switches within the DSA. In some embodiments, DSA attenuator cell switches are fabricated to have positive first-order resistance temperature (FORT) coefficients, while temperature-compensating series attenuation resistances are fabricated as a positive FORT coefficient resistor and temperature-compensating shunt resistances are fabricated as either a negative FORT coefficient resistor or a combination of a negative FORT coefficient resistor in parallel with a positive FORT coefficient resistor.

A frequency equalizer is provided. The frequency equalizer includes a coupler including a main segment extending between a first port and a second port and a coupled segment disposed in a coupling relationship with the main segment and extending between a third port and a fourth port. The frequency equalizer further includes a first thermistor electrically coupled in series between the first port and an input line, a second thermistor electrically coupled in series between the second port and an output line, and a first shunt resistor coupled across the third port. The frequency equalizer simultaneously provides frequency equalization and temperature compensation for signals transmitted through the frequency equalizer.