A delay circuit for time offsetting an input radiofrequency signal, includes an all-pass filter having a given central frequency to linearize a phase-shift of an output signal relative to the input signal as a function of the frequency on a first frequency range; and first and second antiresonant circuits having respectively first and second central frequencies, the all-pass filter and the antiresonant circuits configured to linearize the phase-shift of the output signal relative to the input signal as a function of the frequency on a second frequency range including the first range. The difference between first and second central frequencies is less than 30% of the value of one of both frequencies, the difference between the first central frequency and the given central frequency of the all-pass filter is less than 30% of the value of a highest frequency between the first central frequency and the given central frequency.

Various arrangements of a PIN diode attenuator circuit are presented. The PIN diode attenuator circuit may include a quadrature hybrid coupler. The PIN diode attenuator circuit may include a direct current (DC) feed circuit comprising an adjustable DC voltage source. PIN diode attenuator circuit may include first and second PIN diode circuits connected with ports of the quadrature hybrid coupler. Each PIN diode circuit may include a PIN diode having a first cathode of the first PIN diode directly connected to a ground potential and a first anode of the first PIN diode connected with the DC feed circuit and the quadrature hybrid coupler.

An apparatus includes a radio frequency (RF) input port, an RF output port, a variable attenuation network, a first filter network, a second filter network, and a third filter network. The variable attenuation network may be coupled between the RF input port and the RF output port. Attenuation of the variable attenuation network is controlled by a first control signal and a second control signal. The first filter network may be connected between the RF input port and the RF output port. The second filter network may be connected between the variable attenuation network and a ground potential. The third filter network may be connected between the variable attenuation network and the ground potential. The first, the second, and the third filter networks modify performance of the variable attenuation network to produce a particular tilt of a radio frequency signal passing through the apparatus between the RF input port and the RF output port. The particular tilt is selectable by adjustment of at least one of the first and the second control signals.

Technologies for RFID positioning and tracking apparatus and methods are disclosed herein. The apparatus and methods disclose a radio-frequency identification positioning system that includes a radio-frequency identification reader and a phased-array antenna coupled to the radio-frequency identification reader. Techniques are applied to reduce in-reader and in-antenna signal leakages. Techniques are applied to position and track RFID tags. Circuits with leakage cancellation abilities are also disclosed. Reflective vector attenuators with tunable impedance load are also disclosed. Polarization adjustable antennas with matching circuits used in the RFID positioning system are also disclosed. Circuits to re-transmit a received signal at a higher amplitude to enhance radio link range are also disclosed. Techniques are applied to increase the level of scattered radio signals from RFID tags.

An attenuation circuit comprising: a connection-node for connecting to an RF connection; an isolation-capacitor connected in series between the connection-node and an internal-node; a first-bias-resistor connected in series between a first-control-node and the internal-node; a second-bias-resistor connected in series between the internal-node and a second-control-node; a first-attenuation-diode connected in series between the first-control-node and the internal-node, wherein the anode of the first-attenuation-diode is closest to the first-control-node; a second-attenuation-diode connected in series between the internal-node and the second-control-node, wherein the anode of the second-attenuation-diode is closest to the internal-node; a first-decoupling-capacitor connected in series between the first-control-node and the reference-node; and a second-decoupling-capacitor connected in series between the second-control-node and the reference-node.