A transistor semiconductor die includes a first current terminal, a second current terminal, and a control terminal. A semiconductor structure is between the first current terminal, the second current terminal, and the control terminal and configured such that a resistance between the first current terminal and the second current terminal is based on a control signal provided at the control terminal. Short circuit protection circuitry is coupled between the control terminal and the second current terminal. In a normal mode of operation, the short circuit protection circuitry is configured to provide a voltage drop that is greater than a voltage of the control signal. In a short circuit protection mode of operation, the short circuit protection circuitry is configured to provide a voltage drop that is less than a voltage of the control signal.

A system includes: 1) a battery configured to provide an input voltage (VIN); 2) switching converter circuitry coupled to the battery, wherein the switching converter circuitry includes a power switch; 3) a load coupled to an output of the switching converter circuitry; and 4) a control circuit coupled to the power switch. The control circuit includes: 1) a switch driver circuit coupled to the power switch; 2) a summing comparator circuit configured to output a first control signal that indicates when to turn the power switch on; and 3) an analog on-time extension circuit configured to extend an on-time of the power switch by gating a second control signal with the first control signal, wherein the second control signal indicates when to turn the power switch off.

A semiconductor device includes a switching element, a control circuit, and a first and second temperature detectors. The control circuit controls the switching element and have an overcurrent detection circuit for the switching element. The first temperature detector detects the temperature of the switching element and the second temperature detector detects the temperature of the control circuit. The control circuit includes a reference correction circuit for correcting an overcurrent reference value of the overcurrent detection circuit on the basis of a first detection value and a second detection value detected by the first and second temperature detectors and outputting a corrected overcurrent reference value.

A control circuit of a power conversion apparatus is provided with a switch driving unit that drives the upper and lower arm switches; a short circuit control unit that causes the switch driving unit to execute a short circuit control when a failure occurs in the system, the short circuit control turning an ON side switch to an ON state and turning an OFF side switch to an OFF state; a checking unit that executes a checking process to check whether the short circuit control is able to perform correctly; and a protection control unit that causes the switch driving unit to execute a protection control when a failure occurs on either the upper arm switch or the lower arm switch, the protection control turning the switch where the failure occurs to an OFF state. The control circuit enables the protection control during execution of the checking process.

Circuitry and techniques for providing a bidirectional switch in devices for overcurrent protection and voltage protection are disclosed herein. In one embodiment, a circuit may include a first reverse-blocking insulating gate bipolar transistor (IGBT), having a first gate terminal, first collector terminal and a first emitter terminal. The circuit may include a second reverse-blocking IGBT, having a second gate terminal, a second collector terminal, electrically coupled to the first emitter terminal, and a second emitter terminal, electrically coupled to the first collector terminal. As such the first IGBT and the second IGBT may define a first current path, extending from the first collector to the second emitter; and a switch control circuit, coupled to send a control signal to at least one of: the first gate terminal and the second gate terminal, during an overcurrent event.

A serial IGBT voltage equalization method and system based on an auxiliary voltage source is disclosed. The method includes the following steps. (1) Detect a port dynamic voltage of each serial IGBT. (2) Perform dynamic overvoltage diagnosis respectively on the port dynamic voltage of each IGBT. (3) Supply emergency high level signal to the gate of the IGBT when there is dynamic overvoltage. (4) Stop supplying emergency high level signal to the gate of the IGBT, supply a constant voltage at the gate of the IGBT through the auxiliary voltage source. The invention provides a constant voltage through the auxiliary voltage source, prolongs the off time of the faulty IGBT, and turns off other IGBTs simultaneously, thereby achieving the purpose of serial IGBT voltage equalization.

The present invention relates to a circuit for protecting a switch of an electrical system, said protecting circuit comprising a variable electronic component having a physical characteristic the value of which varies by at least 10% as a function of temperature, the protecting circuit being configured to prohibit a current from passing through said switch when the intensity of said current exceeds a maximum allowed intensity threshold, said variable electronic component being connected in the protecting circuit such that the value of the maximum allowed intensity threshold is directly a function of said physical characteristic.

An integrated circuit may include a power transistor coupled between a supply pin and an output pin; a current sensing circuit configured to sense a load current passing through the power transistor and to provide a respective current sense signal; a first configuration pin; a current output circuit configured to provide a diagnosis current at a current output pin; a diagnosis pin for receiving a diagnosis request signal; and a control circuit configured to: select a characteristic curve representing a current versus time characteristic dependent on a external circuit connected to the first configuration pin; generate a drive signal for the power transistor dependent on the selected characteristic curve and the current sense signal; and control—dependent on a pulse pattern of the diagnosis request signal—the current output circuit to set the value of the diagnosis current such that it represents the load current or the selected characteristic curve.

A power system including a gate driver configured with test circuitry to detect faults is disclosed. The power system may be configured to test the fault detection circuitry in order to confirm its ability to detect faults. Various methods and circuit implementations are disclosed to determine the ability of the system to detect faults. The testing may include different configurations and protocols in order to make conclusions about which components are likely responsible for a failure. These components may include components included in the gate driver or externally coupled to the gate driver. The disclose approach does not significantly add complexity because a test input to initiate a test may be communicated from a low voltage side to a high voltage side over a shared communication channel.

Provided is an overcurrent detection circuit for detecting an overcurrent flowing upon turning on of a switching element, the overcurrent detection circuit including a main current detection unit configured to detect whether an input signal according to a main current is higher than or equal to a set detection threshold, and a condition control unit configured to control at least one of a waveform of the input signal in the main current detection unit or the detection threshold to control a comparison condition in the main current detection unit, in which the condition control unit is configured to set the comparison condition to a first condition during a period from the turning on of the switching element until elapse of a first period, and set the comparison condition to a second condition during a period from the elapse of the first period until elapse of a second period.