An image display apparatus is disclosed. The image display apparatus includes a signal processing device having a transceiver that includes a current sweep circuit configured to output a plurality of sweep currents, a current selector connected to the current sweep circuit and configured to select a predetermined current from the plurality of sweep currents based on comparison with a reference voltage, and a comparator configured to compare a voltage output from the current selector with the reference voltage. Accordingly, a constant output voltage level can be obtained.

Linearity of a PAM-4 voltage-mode driver is improved using current compensation. The driver receives a first input data signal having a first logic level and a second input data signal having a second logic level. In an additive current mode, when the first logic level matches the second logic level, the driver uses switch circuitry to form an auxiliary current path through which supplementary current (I_Supplementary) flows from a voltage regulator. In a primary current mode, when the first logic level does not match the second logic level, the driver uses the switch circuitry to break the auxiliary current path, thereby preventing the supplementary current (I_Supplementary) from flowing from the voltage regulator.

An image display apparatus is disclosed. The image display apparatus includes a signal processing device having a transceiver that includes a current sweep circuit configured to output a plurality of sweep currents, a current selector connected to the current sweep circuit and configured to select a predetermined current from the plurality of sweep currents based on comparison with a reference voltage, and a comparator configured to compare a voltage output from the current selector with the reference voltage. Accordingly, a constant output voltage level can be obtained.

A voltage selecting circuit includes: a first transistor, having a first terminal coupled with a first input terminal and having a second terminal coupled with a voltage output terminal; a second transistor, having a first terminal coupled with a second input terminal and having a second terminal coupled with the voltage output terminal; a first resistor positioned between the first input terminal and a control terminal of the second transistor; a second resistor positioned between the second input terminal and a control terminal of the first transistor; a first current adjusting circuit coupled with the control terminal of the first transistor; a second current adjusting circuit coupled with the control terminal of the second transistor; a comparison circuit for comparing voltages at the first and second input terminals; and a control circuit configured to operably control the first current adjusting circuit and the second current adjusting circuit.

A voltage selecting circuit includes: a first transistor, having a first terminal coupled with a first input terminal and having a second terminal coupled with a voltage output terminal; a second transistor, having a first terminal coupled with a second input terminal and having a second terminal coupled with the voltage output terminal; a first resistor positioned between the first input terminal and a control terminal of the second transistor; a second resistor positioned between the second input terminal and a control terminal of the first transistor; a first current adjusting circuit coupled with the control terminal of the first transistor; a second current adjusting circuit coupled with the control terminal of the second transistor; a comparison circuit for comparing voltages at the first and second input terminals; and a control circuit configured to operably control the first current adjusting circuit and the second current adjusting circuit.

A driver for performing efficient low-power high-swing modulation, which comprises a first plurality of N controllable switching elements and introducing low impedance between the contacts in response to a low control level and vice versa; a second plurality of N controllable switching elements and introducing high impedance between the contacts in response to a low control level and vice versa; a DC power supply for feeding the driver, the positive port of which is connected to the common contact of the first plurality and the negative port of which is connected to the common contact of the second plurality; a plurality of N voltage dividers, each divider consisting of two serially connected resistors connecting between a free contact of a controllable switching element from the first plurality and a free contact of a controllable switching element from the second plurality, where each two controllable switching elements connected by a voltage divider forming a pair; a plurality of N control inputs, each of which jointly controlling the control inputs of a different pair; and a common output connecting between all N common points of all pairs of serially connected resistors forming the N voltage dividers.