An aspect of the disclosure relates to an apparatus including an output driver, including: a first p-channel metal oxide semiconductor field effect transistor (PMOS FET); a second PMOS FET coupled in series with the first PMOS FET between an upper voltage rail and an output; a first n-channel metal oxide semiconductor field effect transistor (NMOS FET); and a second NMOS FET coupled in series with the first NMOS FET between the output and a lower voltage rail; a first predriver coupled to gates of the first and second PMOS FETs and first and second NMOS FETs; and a second predriver coupled to the gates of the first and second PMOS FETs and first and second NMOS FETs.

A device for hooking up a signal-outputting mechanism with two potential sensors each of which has allocated to it two evaluation terminals, wherein the potentials of the evaluation terminals depend inversely on the resistances between the respective evaluation terminals.

Current sharing among bidirectional double-base bipolar junction transistors. One example is a method comprising: conducting current through a first bidirectional double-base bipolar junction transistor (first B-TRAN); conducting current through a second B-TRAN the second B-TRAN coupled in parallel with the first B-TRAN; measuring a value indicative of conduction of the first B-TRAN, and measuring a value indicative of conduction of the second B-TRAN; and adjusting a current flow through the first B-TRAN, the adjusting responsive to the value indicative of conduction of the first B-TRAN being different than the value indicative of conduction of the second B-TRAN.

A direct current (DC) power system includes a plurality of energy sources supplying power to a plurality of loads via a DC bus having at least one positive rail. The DC bus includes two DC bus subsections and a DC bus separator coupled between the two DC bus subsections. The DC bus separator includes a controllable switch with at least one of its terminals coupled with a terminal of an inductor to provide a current path between the two DC bus subsections during normal operation via the inductor. The controllable switch is switched off to break the current path when a fault on the positive rail is detected. Furthermore, the DC bus separator includes a diode connected in parallel to the inductor and arranged to provide a circulating current path to dissipate an inductor current in the inductor when the controllable switch is switched off.

A thyristor switch is constituted of a pair of arms connected in anti-parallel, each of the anus including a plurality of thyristors connected in series. A controller includes a phase detecting unit configured to detect a phase of a power supply voltage supplied from an alternating-current power supply, and a gate signal generating unit configured to interrupt a gate signal when an open command is provided to the static switch and the phase of the power supply voltage detected by the phase detecting unit matches a target phase. The target phase is set outside of a phase range where interruption of the gate signal is prohibited, the phase range being set so as to include a zero crossing point at which a load current is switched in polarity.

A thyristor switch is constituted of a pair of arms connected in anti-parallel, each of the anus including a plurality of thyristors connected in series. A controller includes a phase detecting unit configured to detect a phase of a power supply voltage supplied from an alternating-current power supply, and a gate signal generating unit configured to interrupt a gate signal when an open command is provided to the static switch and the phase of the power supply voltage detected by the phase detecting unit matches a target phase. The target phase is set outside of a phase range where interruption of the gate signal is prohibited, the phase range being set so as to include a zero crossing point at which a load current is switched in polarity.

Power is inverted using double-base-contact bidirectional bipolar transistors in a three-level-inverter topology. The transistors not only switch to synthesize a PWM approximation of the desired AC waveform, but also have transient phases of diode conduction before each full turn-on or turn-off.

Power is inverted using double-base-contact bidirectional bipolar transistors in a three-level-inverter topology. The transistors not only switch to synthesize a PWM approximation of the desired AC waveform, but also have transient phases of diode conduction before each full turn-on or turn-off.

B-TRAN bipolar power transistor devices and methods, using a drift region which is much thinner than previously proposed double-base bipolar transistors of comparable voltage. This is implemented in a high-bandgap semiconductor material (preferably silicon carbide). Very high breakdown voltage, and fast turn-off, are achieved with very small on-resistance.

Methods and systems for double-sided semiconductor device fabrication. Devices having multiple leads on each surface can be fabricated using a high-temperature-resistant handle wafer and a medium-temperature-resistant handle wafer. Dopants can be introduced on both sides shortly before a single long high-temperature diffusion step diffuses all dopants to approximately equal depths on both sides. All high-temperature processing occurs with no handle wafer or with a high-temperature handle wafer attached. Once a medium-temperature handle wafer is attached, no high-temperature processing steps occur. High temperatures can be considered to be those which can result in damage to the device in the presence of aluminum-based metallizations.