H03K2005/00104

Method and apparatus for precision phase skew generation

A method and apparatus of generating precision phase skews is disclosed. In some embodiments, a phase skew generator includes: a charge pump having a first mode of operation and a second mode of operation, wherein the first mode of operation provides a first current path during a first time period, and the second mode of operation provides a second current path during a second time period following the first time period; a sample and hold circuit, coupled to a capacitor, and configured to sample a voltage level of the capacitor at predetermined times and provide an output voltage during a third time period following the second time period; and a voltage controlled delay line, coupled to the sample and hold circuit, and having M delay line stages each configured to output a signal having a phase skew offset with respect to preceding or succeeding signal.

METHOD OF SPEEDING UP OUTPUT ALIGNMENT IN A DIGITAL PHASE LOCKED LOOP

To speed up output clock alignment in a digital phase locked loop wherein a controlled oscillator generates synthesizer pulses that are divided to produce output pulses at a predetermined normal spacing and time location, and wherein during an alignment procedure the output pulses are moved in time in response to a delay value obtained by comparing a phase of the output pulses with a phase applied to the controlled oscillator averaged over a number of synthesizer pulses in a feedback circuit to align said output pulses with a reference clock taking into account hardware delay, a group of the output pulses is advanced during the alignment procedure to reduce the spacing between them. After determining the delay value averaged over the group of output pulses subsequent output pulses are restored to their normal spacing and time locations.

Electronic circuit and method for clock skew-calibration

The electronic circuit for multiphase clock skew calibration of at least one example embodiment provides a novel low power solution to detect clock skew errors with very high accuracy, of the order of a few femto seconds, and corrects clock skew errors and decreases and/or minimizes high frequency jitter in a data path of the electronic circuit.

Demodulation methods and devices for frequency-modulated (FM) signals

An apparatus includes a phase modulator configured to modulate a phase of an incoming frequency-modulated signal based on a clock signal to generate a phase-modulated signal, where the clock signal is associated with a clock frequency. The apparatus also includes an etalon configured to receive the phase-modulated signal and generate an output signal based on the phase-modulated signal. The apparatus further includes a detector configured to identify amplitudes associated with a first harmonic of the clock frequency and a first subharmonic of the clock frequency in the output signal. In addition, the apparatus includes a decoder configured to recover information encoded in the incoming frequency-modulated signal based on instantaneous frequency deviations of the incoming frequency-modulated signal, where the instantaneous frequency deviations are identified based on relative amplitudes of the first harmonic and the first subharmonic.

METHOD AND APPARATUS FOR PRECISION PHASE SKEW GENERATION

A method and apparatus of generating precision phase skews is disclosed. In some embodiments, a phase skew generator includes: a charge pump having a first mode of operation and a second mode of operation, wherein the first mode of operation provides a first current path during a first time period, and the second mode of operation provides a second current path during a second time period following the first time period; a sample and hold circuit, coupled to a capacitor, and configured to sample a voltage level of the capacitor at predetermined times and provide an output voltage during a third time period following the second time period; and a voltage controlled delay line, coupled to the sample and hold circuit, and having M delay line stages each configured to output a signal having a phase skew offset with respect to preceding or succeeding signal.

Method and apparatus for precision phase skew generation

A method and apparatus of generating precision phase skews is disclosed. In some embodiments, a phase skew generator includes: a charge pump having a first mode of operation and a second mode of operation, wherein the first mode of operation provides a first current path during a first time period, and the second mode of operation provides a second current path during a second time period following the first time period, a sample and hold circuit, coupled to a capacitor, and configured to sample a voltage level of the capacitor at predetermined times and provide an output voltage during a third time period following the second time period; and a voltage controlled delay line, coupled to the sample and hold circuit, and having M delay line stages each configured to output a signal having a phase skew offset with respect to preceding or succeeding signal.

METHOD AND APPARATUS FOR PRECISION PHASE SKEW GENERATION

A method and apparatus of generating precision phase skews is disclosed. In some embodiments, a phase skew generator includes: a charge pump having a first mode of operation and a second mode of operation, wherein the first mode of operation provides a first current path during a first time period, and the second mode of operation provides a second current path during a second time period following the first time period, a sample and hold circuit, coupled to a capacitor, and configured to sample a voltage level of the capacitor at predetermined times and provide an output voltage during a third time period following the second time period; and a voltage controlled delay line, coupled to the sample and hold circuit, and having M delay line stages each configured to output a signal having a phase skew offset with respect to preceding or succeeding signal.

Fixed-width pulse generator

A fixed-width pulse generator includes a metastability detector circuit, a delay signal generator, and a combinational logic circuit. The metastability detector circuit is configured to receive a trigger signal and generate state detection signals. The delay signal generator is configured to receive the state detection signals and the trigger signal, and delay the trigger signal by two different delay values to generate two different delayed signals. One of the delay values is based on the state detection signals. The combinational logic circuit is configured to receive the two delayed signals and an error signal, and generate a fixed-width pulse that remains constant over process, voltage, and temperature variations.

Method and apparatus for precision phase skew generation

A method and apparatus of generating precision phase skews is disclosed. In some embodiments, a phase skew generator includes: a charge pump having a first mode of operation and a second mode of operation, wherein the first mode of operation provides a first current path during a first time period, and the second mode of operation provides a second current path during a second time period following the first time period; a sample and hold circuit, coupled to a capacitor, and configured to sample a voltage level of the capacitor at predetermined times and provide an output voltage during a third time period following the second time period; and a voltage controlled delay line, coupled to the sample and hold circuit, and having M delay line stages each configured to output a signal having a phase skew offset with respect to preceding or succeeding signal.

METHOD AND APPARATUS FOR PRECISION PHASE SKEW GENERATION

A method and apparatus of generating precision phase skews is disclosed. In some embodiments, a phase skew generator includes: a charge pump having a first mode of operation and a second mode of operation, wherein the first mode of operation provides a first current path during a first time period, and the second mode of operation provides a second current path during a second time period following the first time period; a sample and hold circuit, coupled to a capacitor, and configured to sample a voltage level of the capacitor at predetermined times and provide an output voltage during a third time period following the second time period; and a voltage controlled delay line, coupled to the sample and hold circuit, and having M delay line stages each configured to output a signal having a phase skew offset with respect to preceding or succeeding signal.