In an embodiment a ring oscillator circuit includes a chain of cascade-coupled inverter stages coupled between an oscillator supply voltage node and a reference voltage node, the oscillator supply voltage node configured to provide an oscillator supply voltage, a current generator circuit coupled between the oscillator supply voltage node and a system supply voltage node configured to provide a system supply voltage, the current generator circuit being configured to inject a current into the oscillator supply voltage node and a biasing circuit including a first bias control transistor and a second bias control transistor coupled in series between the reference voltage node and the oscillator supply voltage node, wherein the first bias control transistor is configured to selectively couple the reference voltage node and the oscillator supply voltage node in response to the oscillator control signal being indicative that the ring oscillator circuit is in an inactive operation state.

An oscillation circuit includes first and second constant current circuits, first and second switch circuits, first and second MOS transistors, and an output port. The first constant current circuit is connected to one port of a capacitor. The first MOS transistor has a gate and a drain connected to the second constant current circuit and a source connected to another port of the capacitor. The second MOS transistor has a gate connected to the gate of the first MOS transistor, and a drain connected to the one port of the capacitor. The second switch circuit is connected between a source of the second MOS transistor and a second power supply terminal. The output port outputs a signal based on a voltage of the one port. Turn-on and turn-off of the first and second switch circuits are controlled by the signal of the output port and an inverted signal.

An oscillation circuit includes first and second constant current circuits, first and second switch circuits, first and second MOS transistors, and an output port. The first constant current circuit is connected to one port of a capacitor. The first MOS transistor has a gate and a drain connected to the second constant current circuit and a source connected to another port of the capacitor. The second MOS transistor has a gate connected to the gate of the first MOS transistor, and a drain connected to the one port of the capacitor. The second switch circuit is connected between a source of the second MOS transistor and a second power supply terminal. The output port outputs a signal based on a voltage of the one port. Turn-on and turn-off of the first and second switch circuits are controlled by the signal of the output port and an inverted signal.

The present invention provides a voltage multiplier system for an electrical device. The system includes a multi-vibrator adapted to generate a clock signal, and a voltage-multiplier module. Further, the multi-vibrator includes a pair of transistors, and at least one resistor-capacitor module. Further, the at least one resistor-capacitor module is connected between the emitter terminal and a base terminal of each of the pair of transistors to limit voltage between the base terminal and the emitter terminal of each of the pair of transistors. The voltage-multiplier module is adapted to boost an input voltage based on the clock signal received from the multi-vibrator.

The present invention provides a voltage multiplier system for an electrical device. The system includes a multi-vibrator adapted to generate a clock signal, and a voltage-multiplier module. Further, the multi-vibrator includes a pair of transistors, and at least one resistor-capacitor module. Further, the at least one resistor-capacitor module is connected between the emitter terminal and a base terminal of each of the pair of transistors to limit voltage between the base terminal and the emitter terminal of each of the pair of transistors. The voltage-multiplier module is adapted to boost an input voltage based on the clock signal received from the multi-vibrator.

There is provided a semiconductor device comprising: a first inverter circuit (11) connected in parallel to a crystal vibrating element (X1); a second inverter circuit (12) connected to the first inverter circuit (11) so as to share an input therewith, and outputting an oscillation signal; and a wave filter (14) connected to the second inverter circuit (12) and having a passband that is determined in advance and includes an oscillation frequency of the oscillation signal.

A novel oscillator, an amplifier circuit, an inverter circuit, an amplifier circuit, a battery control circuit, a battery protection circuit, a power storage device, a semiconductor device, an electric device, and the like are provided. The semiconductor device includes an oscillator including a first transistor containing a metal oxide, and a second transistor to a fifth transistor, in which a first potential is supplied to a gate of the second transistor and a gate of the third transistor when the first transistor is turned on, and the first potential is held when the first transistor is turned off. The oscillator supplies a first signal based on the first potential to a first circuit. The first circuit performs at least one of shaping and amplification on the first signal. The second transistor and the fourth transistor are connected in series, and the third transistor and the fifth transistor are connected in series. A source or a drain of the third transistor is electrically connected to a gate of the fourth transistor, and a source or a drain of the fourth transistor is electrically connected to the gate of the third transistor.

An oscillator circuit includes a first comparator that outputs a first signal indicative of a comparison result between an input potential and a threshold, a second comparator that outputs a second signal indicative of a comparison result between an input potential and the threshold, a RS flip-flop circuit that receives the first signal and the second signal and outputs first and second oscillation signals, a first charge/discharge unit that charges and discharges a first capacitor based on the first oscillation signal, a second charge/discharge unit that charges and discharges a second capacitor based on the second oscillation signal, a first dummy switch controlled to be on and off according to the second oscillation signal and adding a predetermined capacity to a first node, and a second dummy switch controlled to be on and off according to the first oscillation signal and adding a predetermined capacity to a second node.

In an embodiment a ring oscillator circuit includes a chain of cascade-coupled inverter stages coupled between an oscillator supply voltage node and a reference voltage node, the oscillator supply voltage node configured to provide an oscillator supply voltage, a current generator circuit coupled between the oscillator supply voltage node and a system supply voltage node configured to provide a system supply voltage, the current generator circuit being configured to inject a current into the oscillator supply voltage node and a biasing circuit including a first bias control transistor and a second bias control transistor coupled in series between the reference voltage node and the oscillator supply voltage node, wherein the first bias control transistor is configured to selectively couple the reference voltage node and the oscillator supply voltage node in response to the oscillator control signal being indicative that the ring oscillator circuit is in an inactive operation state.

A novel phase locked loop design utilizing novel phase-frequency detector, charge pump, loop filter and voltage controlled oscillator is disclosed. The phase-frequency detector includes a dual reset D-flip flop for use in multi-GHz phase locked loops. Traditional dead zone issues associated with phase frequency detector are improved/addressed by use with a charge transfer-based PLL charge pump.