Aspects of the disclosure are directed to compensating for errors in in an analog-to-digital converter circuit (ADC). As may be implemented in accordance with one or more embodiments, an apparatus and/or method involves an ADC that converts an analog signal into a digital signal using an output from a digital-to-analog converter circuit (DAC). A compensation circuit generates a compensation output by, for respective signal portions provided to the DAC, generating a feedback signal based on an incompatibility between the conversion of the signal portions into an analog signal and the value of the signal portions provided to the DAC. A compensation output is generated based on the signal input to the DAC with a gain applied thereto, based on the feedback signal. Hereby, the digital inputs provided to the DACs are non-randomized.

The present embodiments provide an analog to digital converter, including a beam splitter, M photodetectors, M amplifier modules, and an encoder. Each output end of the beam splitter is corresponding to an input end of a photodetector, an output end of each photodetector is connected to an input end of an amplifier module, and an output end of each amplifier module is connected to an input end of the encoder. The beam splitter splits an inputted analog optical signal into M optical signals, outputs each optical signal to a corresponding photodetector to convert each optical signal into a current signal, inputs each current signal to a corresponding amplifier module to generate an output voltage, and outputs the output voltage to a corresponding input end of the encoder.

A control device according to an embodiment includes a driving unit that supplies, to a control target, a current or a voltage on which an Alternating-Current (AC) component is superimposed, an Analog-to-Digital (AD) converter, and an AD conversion controller. The AD conversion controller causes, in an AC cycle of the AC component, the AD converter to execute a first AD conversion in synchronization with a starting timing of the AC cycle, and then to execute second and subsequent AD conversions at predetermined time intervals in response to a trigger by an internal timer of the AD converter.

Single-stage and multiple-stage current-mode Analog-to-Digital converters (iADC)s utilizing apparatuses, circuits, and methods are described in this disclosure. The disclosed iADCs can operate asynchronously and be free from the digital clock noise, which also lowers dynamic power consumption, and reduces circuitry overhead associated with free running clocks. For their pseudo-flash operations, the disclosed iADCs do not require their input current signals to be replicated which saves area, lowers power consumption, and improves accuracy. Moreover, the disclosed methods of multi-staging of iADCs increase their resolutions while keeping current consumption and die size (cost) low. The iADC's asynchronous topology facilitates decoupling analog-computations from digital-computations, which helps reduce glitch, and facilitates gradual degradation (instead of an abrupt drop) of iADC's accuracy with increased input current signal frequency. The iADCs can be arranged with minimal digital circuitry (i.e., be digital-light), thereby saving on die size and dynamic power consumption.

A high-speed and high-precision photonic analog-to-digital conversion device capable of realizing intelligent signal processing. Learning ability of deep learning technology is utilized to learn the nonlinear response and channel mismatch effect of the system and configure optimal parameters of the deep network. Deterioration of photonic analog-to-digital conversion system performance caused by nonlinear distortion and channel mismatch distortion is eliminated in real time, and performance indicators thereof are improved. By using the induction and deduction ability of deep learning technology, intelligent signal processing of the input signal is realized, and users are provided with digital signals that meet the requirements. It's important for improving the performance of microwave photonic systems that require high sampling rate, high time precision, and high sampling accuracy, such as microwave photonic radar and optical communication systems, and also critical to improve the signal processing ability of such systems under complex conditions.

An analog-to-digital converter including a first stage and a second stage. The first stage includes a first sample-and-hold (SH) having an input coupled to a voltage input node of the ADC, and having a first SH output. The first stage also includes a buffer, a first flash converter and a first digital-to-analog converter (DAC). The buffer has an input coupled to the first SH output and has a buffer output. The first flash converter has an input coupled to the first SH output, and has a first flash converter output. The first DAC has an input coupled to the first flash converter output. The second stage includes a second flash converter having an input coupled to the buffer output.

Digital calibration systems and related methods are disclosed for multi-stage analog-to-digital converters (ADCs). For one embodiment, a multi-stage ADC includes an initial ADC, an additional ADC, and calibration logic. The initial ADC generates an output signal and N-bit digital values that are based upon an input signal. The additional ADC receives the output signal from the initial ADC and generates M-bit digital values that are based upon the output signal. The calibration logic receives the N-bit digital values and the M-bit digital values and generates correction values. The correction values are based upon differences between maximum values and minimum values for M-bit digital values associated with different regions determined by the N-bit digital values. Digital conversion outputs for the multi-stage ADC are provided as combinations of the N-bit digital values and the M-bit digital values corrected with the correction values.

A high-speed and high-precision photonic analog-to-digital conversion device capable of realizing intelligent signal processing. Learning ability of deep learning technology is utilized to learn the nonlinear response and channel mismatch effect of the system and configure optimal parameters of the deep network. Deterioration of photonic analog-to-digital conversion system performance caused by nonlinear distortion and channel mismatch distortion is eliminated in real time, and performance indicators thereof are improved. By using the induction and deduction ability of deep learning technology, intelligent signal processing of the input signal is realized, and users are provided with digital signals that meet the requirements. It's important for improving the performance of microwave photonic systems that require high sampling rate, high time precision, and high sampling accuracy, such as microwave photonic radar and optical communication systems, and also critical to improve the signal processing ability of such systems under complex conditions.

An analog-to-digital converter including a first stage and a second stage. The first stage includes a first sample-and-hold (SH) having an input coupled to a voltage input node of the ADC, and having a first SH output. The first stage also includes a buffer, a first flash converter and a first digital-to-analog converter (DAC). The buffer has an input coupled to the first SH output and has a buffer output. The first flash converter has an input coupled to the first SH output, and has a first flash converter output. The first DAC has an input coupled to the first flash converter output. The second stage includes a second flash converter having an input coupled to the buffer output.

The present embodiments provide an analog to digital converter, including a beam splitter, M photodetectors, M amplifier modules, and an encoder. Each output end of the beam splitter is corresponding to an input end of a photodetector, an output end of each photodetector is connected to an input end of an amplifier module, and an output end of each amplifier module is connected to an input end of the encoder. The beam splitter splits an inputted analog optical signal into M optical signals, outputs each optical signal to a corresponding photodetector to convert each optical signal into a current signal, inputs each current signal to a corresponding amplifier module to generate an output voltage, and outputs the output voltage to a corresponding input end of the encoder.