H03M13/413

CONVOLUTIONAL DECODER AND METHOD OF DECODING CONVOLUTIONAL CODES
20180013447 · 2018-01-11 ·

A convolutional decoder includes a first storage, a second storage, a branch metric processor to determine branch metrics for transitions of states from a start step to a last step according to input bit streams, an ACS processor to select maximum likelihood path metrics to determine a survival path according to the branch metrics and to update states of the start step to the first storage and the second storage alternately based on the selection of the maximum likelihood path metrics, and a trace back logic to selectively trace back the survival path based on the states of the start step stored in a selected storage among the first storage and the second storage.

METHOD AND SYSTEM FOR ERROR CHECKING IN WIRELESS COMMUNICATIONS
20230131991 · 2023-04-27 ·

A method and system for error checking in a wireless communication are provided. The method includes: receiving a payload; determining a final decoding result of the payload, the final decoding result indicating a start state and an end state; determining whether the end state is identical to the start state based on a state circularity check; and determining to discard the final decoding result based on whether the end state is identical to the start state.

TAIL BITING CONVOLUTIONAL CODE (TBCC) ENHANCEMENT WITH STATE PROPAGATION AND LIST DECODING

Certain aspects of the present disclosure relate to techniques and apparatus for enhanced decoding, for example, by providing a multi-phase tail biting convolutional code (TBCC) decoding algorithm. An exemplary method generally includes obtaining, via a wireless medium, a codeword encoded with a TBCC encoding scheme, generating metrics for candidate paths through trellis stages of a decoder, propagating information from at least one of the trellis stages to a later trellis stage, while generating the metrics, selecting a set of the candidate paths based on the propagated information, and decoding the encoded codeword by evaluating the selected set of candidate paths based, at least in part, on the generated metrics. Other aspects, embodiments, and features are claimed and described.

Data decoding circuit and method
20220116140 · 2022-04-14 ·

The present invention discloses a data decoding circuit. A data reforming circuit receives encoded data encoded by using tail-biting convolutional code to identify a first unknown bit section, a known bit section and a second unknown bit section in an order to further connect the second unknown bit section and the first unknown bit section in series to generate data to be decoded. A decoding circuit decodes the data to be decoded by using Viterbi algorithm and at least one piece of known bit information to generate a decoded result that includes a second decoded bit section and a first decoded bit section respectively corresponding to the second unknown bit section and the first unknown bit section. A data restoring circuit connects the first decoded bit section, a known decoded bit section corresponding to the known bit section and the second decoded bit section in series to generate decoded data.

Data decoding circuit and method

The present invention discloses a data decoding circuit. A data reforming circuit receives encoded data encoded by using tail-biting convolutional code to identify a first unknown bit section, a known bit section and a second unknown bit section in an order to further connect the second unknown bit section and the first unknown bit section in series to generate data to be decoded. A decoding circuit decodes the data to be decoded by using Viterbi algorithm and at least one piece of known bit information to generate a decoded result that includes a second decoded bit section and a first decoded bit section respectively corresponding to the second unknown bit section and the first unknown bit section. A data restoring circuit connects the first decoded bit section, a known decoded bit section corresponding to the known bit section and the second decoded bit section in series to generate decoded data.

Apparatus and method for decoding signal in wireless communication system

The present disclosure relates to a pre-5.sup.th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4.sup.th-Generation (4G) communication system such as Long Term Evolution (LTE). A method of decoding a signal in a communication system includes receiving an encoded bit-stream corresponding to message bits and first Cyclic Redundancy Check (CRC) bits, obtaining a codeword through a traceback for at least part of the encoded bit-stream, generating second CRC bits by performing CRC encoding on the codeword, and performing decoding based on at least part of the second CRC bits.

APPARATUS AND METHOD FOR DECODING SIGNAL IN WIRELESS COMMUNICATION SYSTEM

The present disclosure relates to a pre-5.sup.th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4.sup.th-Generation (4G) communication system such as Long Term Evolution (LTE). A method of decoding a signal in a communication system includes receiving an encoded bit-stream corresponding to message bits and first Cyclic Redundancy Check (CRC) bits, obtaining a codeword through a traceback for at least part of the encoded bit-stream, generating second CRC bits by performing CRC encoding on the codeword, and performing decoding based on at least part of the second CRC bits.

Convolutional code decoder and convolutional code decoding method

The invention discloses a convolutional code decoder and a convolutional code decoding method. The convolutional code decoder and the convolutional code decoding method of the present invention perform decoding using predictive information, and therefore can demodulate/decode signals more quickly. Earlier completion of demodulation/decoding of signals can terminate the operation earlier and thereby achieve the effect of power savings. The convolutional code decoder performs decoding according to received data and auxiliary data to obtain target data, and includes a first error detection data generation circuit, a channel coding circuit, a first selection circuit, a first Viterbi decoding circuit, a second error detection data generation circuit, a comparison circuit, a second selection circuit, and a second Viterbi decoding circuit.

Early-termination of decoding convolutional codes

A decoder having an input configured to receive a sequence of softbits presumed to correspond to a convolutionally-encoded codeword; and a decoding circuit configured to: determine, as part of a decoding process, a Maximum Likelihood (ML) survivor path in a trellis representation of the codeword; determine whether the presumed convolutionally-encoded codeword meets an early-termination criteria; and abort the decoding process if the presumed convolutionally-encoded codeword meets the early-termination criteria, continue the decoding process if the presumed convolutionally-encoded codeword fails to meet the early-termination criteria.

Encoder device, decoder device, and methods thereof

An embodiment encoder device for encoding an information word c=[c.sub.0, c.sub.1, . . . , c.sub.K-1] having K information bits, c.sub.i, includes an encoder for a tail biting convolutional code having a constraint length, L, where K<L1; the encoder being configured to receive the K information bits; and encode the K information bits so as to provide an encoded code word. An embodiment decoder device for determining an information word c=[c.sub.0, c.sub.1, . . . , c.sub.K-1], having K information bits, c.sub.i, includes a decoder for a tail biting convolutional code having a constraint length, L, where K<L1; the decoder being configured to: receive an input sequence; compute at least one reliability parameter based on the received input sequence; and determine an information word c based on the at least one reliability parameter.