H04J3/0661

CLOCK DETERMINING METHOD AND RELATED APPARATUS
20230050042 · 2023-02-16 ·

A clock determining method includes: when both a second network device and a first network device are synchronous with a reference clock, simulating, by using delay information between the second network device and the first network device and clock frequency information of the second network device, a second virtual clock synchronized with a first virtual clock, where the first virtual clock is used to simulate a clock of the first network device. A clock of the second network device can thus be simulated to perform a subsequent operation by using the simulated clock. For example, the simulated clock may be used to estimate precision time protocol (PTP) message synchronization performance of the second network device. Therefore, the PTP message synchronization performance of the second network device may be pre-determined before a global navigation satellite system (GNSS) fails, to guide network operation and maintenance activities.

A BASE STATION AND A METHOD THERETO

Disclosed is a base station including at least one baseband processing unit, a front-haul network and at least one remote radio unit. The base station further includes an adaptation unit configured to control transmission data packets between the baseband processing unit and at least one remote radio unit. The adaptation unit includes a buffer module and a communication module that is configured to determine if the buffer module includes at least one data packet to be transmitted at a scheduled instant of time, and in response to a detection that the at least one data packet is missing the communication module inserts padding data to the buffer module. The invention also relates to a method thereto.

High accuracy time stamping for multi-lane ports

In a transceiver, the accuracy of a packet time stamp can be improved by compensating for errors introduced by processing of the packet. A received packet can be received via multiple lanes. A packet time stamp can be measured using a start of frame delimiter (SFD). A last arriving lane can be used to provide a recovered clock signal. A phase offset between the recovered clock signal and the system clock of the transceiver can be used to adjust the time stamp. A position of the SFD within a data block can be used to adjust the time stamp. A position of the data block within a combined group of data blocks can be used to adjust the time stamp. Also, a serializer-deserializer delay associated with the last arriving lane can be used to adjust the time stamp.

Accurate time-stamping of outbound packets

A network device includes a port, a transmission pipeline and a time-stamping circuit. The port is configured for connecting to a network. The transmission pipeline includes multiple pipeline stages and is configured to process packets and to send the packets to the network via the port. The time-stamping circuit is configured to temporarily suspend at least some processing of at least a given packet in the transmission pipeline, to verify whether a pipeline stage having a variable processing delay, located downstream from the time-stamping circuit, meets an emptiness condition, and, only when the pipeline stage meets the emptiness condition, to time-stamp the given packet and resume the processing of the given packet.

DYNAMICALLY ESTIMATING A PROPAGATION TIME BETWEEN A FIRST NODE AND A SECOND NODE OF A WIRELESS NETWORK
20230239063 · 2023-07-27 · ·

Apparatuses, methods, and systems for dynamically estimating a propagation time between a first node and a second node of a wireless network are disclosed. One method includes receiving, by the second node, from the first node a packet containing a first timestamp representing the transmit time of the packet, receiving, by the second node, from a local time source, a second timestamp corresponding with a time of reception of the first timestamp received from the first node, calculating a time difference between the first timestamp and the second timestamp, storing the time difference between the first timestamp and the second timestamp, calculating a predictive model for predicting the propagation time based the time difference between the first timestamp and the second timestamp, and estimating the propagation time between the first node and the second node at a time by querying the predictive model with the time.

Clock error-bound tracker

In one embodiment, a device includes a hardware clock to maintain a clock value, a hardware counter to maintain an estimation of a dynamic error bound of the clock value, and a clock controller to intermittently discipline the hardware clock responsively to a remote clock, advance the hardware counter at a rate responsively to a clock drift, and adjust the hardware counter responsively to the hardware clock being disciplined.

METHOD AND SYSTEM FOR DELAYED CYCLIC FORWARDING OF MESSAGES
20230024981 · 2023-01-26 ·

A method for delayed cyclic forwarding of messages by a system includes: receiving, by an input side of the system, the messages to be forwarded; and sending, by an output side of the system, the messages to be forwarded to a receiving device. A check is performed to determine whether the difference between a current system time and a receive time of a message under consideration is greater than or equal to the delay time. In the event that the difference is greater than or equal to the delay time, the message that has been in the buffer memory for the next longest time being checked in the same manner, and the checking of the messages is continued until a difference smaller than the specified delay time is found for a message.

Synchronized Control of Sensors in an Ethernet Network
20230224140 · 2023-07-13 ·

An apparatus for controlling a sensor over a network includes a transceiver and a processor. The transceiver is configured to communicate over the network. The processor is configured to receive or generate control data for controlling a sensor, the sensor being connected to the network by a peer device. The processor is further configured to wake-up a link with the peer device in accordance with a schedule, and, during a time period in the schedule in which the link with the peer device is awake, to send to the peer device a packet comprising the control data.

Methods and systems for parallel processing of batch communications during data validation
11558300 · 2023-01-17 · ·

Methods and systems for parallel processing of batch communications during data validation using a plurality of independent processing streams. For example, the system may receive a plurality of communications for batch processing during a predetermined time period. The system may process, with a batch configuration file, a first alphanumeric data string of a first communication of the plurality of communications. The system may process, with the batch configuration file, a second alphanumeric data string of a second communication of the plurality of communications. The system may direct the first communication to a first micro-batch for processing within the predetermined time period based on the first metadata tag, wherein the first micro-batch is processed using a first validation and enrichment protocol and a first micro-batch configuration file, wherein the first validation and enrichment protocol and the first micro-batch configuration file are specific to the first source.

Method and apparatus for processing service data in optical transport network
11700083 · 2023-07-11 · ·

A method for processing service data in an optical transport network includes receiving service data, where the service data is to be mapped to a plurality of consecutive data frames, determining a quantity of code blocks, occupied by the service data, of each of the plurality of consecutive data frames and locations of the code blocks, where the code block includes a payload area and an overhead area, the payload area of the code block is used to carry the service data, and the overhead area of the code block includes identification information of the service data, and mapping the service data to the plurality of consecutive data frames based on the quantity of code blocks and the locations of the code blocks.