A packet processing method includes receiving a first packet by a first receiving interface of a media conversion module of a first network device, where the first packet includes a first alignment marker (AM), sending a second packet by a first sending interface of the media conversion module, where the second packet includes the first AM, and where the second packet is the first packet processed by the media conversion module, and calculating a time interval T.sub.1 between a time at which the media conversion module receives the first packet and a time at which the media conversion module sends the second packet, where the T.sub.1 is used to compensate for a first timestamp at which the first network device receives or sends the third packet.

Synchronization of clocks among computing devices in a network includes determining master/slave relations among the computing devices. Some computing devices (e.g., switches) include trunk ports configured to carry traffic for several logical networks; e.g., virtual local area networks, VLANs. A trunk port can be associated with a master/slave setting for each logical network that it is configured for. Synchronization of clocks among the computing devices further includes running a synchronization sequence between a trunk port and each computing device on each of the logical networks configured on the trunk port.

In a hybrid network comprising both guided and wireless communications technologies, a grandmaster clock is designated in one portion of the network and can be propagated across to the other portion by means of a timing synchronization message. This message may include timestamping information and other information to enable recipient devices to correctly synchronize to the grandmaster clock.

In one embodiment, a processing apparatus includes processing circuitry to process an event, a timestamping unit to generate a timestamp for the event, at least one register to store at least one parameter describing a hardware state of the processing circuitry, and timestamp correction processing circuitry to compute a time value as a correction to the generated timestamp responsively to the at least one parameter.

Synchronization of clocks among computing devices in a network includes determining master/slave relations among the computing devices. Some computing devices (e.g., switches) include trunk ports configured to carry traffic for several logical networks; e.g., virtual local area networks, VLANs. A trunk port can be associated with a master/slave setting for each logical network that it is configured for. Synchronization of clocks among the computing devices further includes running a synchronization sequence between a trunk port and each computing device on each of the logical networks configured on the trunk port.

A network device may assign, to a port of a plurality of ports on the network device, a precision timing protocol (PTP) port priority for PTP communications between the network device and another network device. The network device and the other network device may be communicatively connected via a plurality of links in a link aggregation group (LAG). Each port, of the plurality of ports, may be associated with a respective link, of the plurality of links, in the LAG. The network device may generate a link layer discovery protocol (LLDP) frame that includes information identifying the PTP port priority assigned to the port. The network device may transmit the LLDP frame to the other network device to identify, to the other network device, the PTP port priority.

An example method comprises receiving, by a first PHY of a first transceiver, a timing packet, timestamping, by the first transceiver, the timing packet and providing the timing packet to a first intermediate node, determining a first offset between the first intermediate node and the first transceiver, updating a first field within the timing packet with the first offset between the first intermediate node and the first transceiver, the offset being in the direction of the second transceiver, receiving the timing packet by a second transceiver, the timing packet including the first field, information within the first field being at least based on the first offset, determining a second offset between the second transceiver and an intermediate node that provided the timing packet to the second transceiver and correcting a time of the second transceiver based on the information within the first field and the second offset.

Systems and methods for regaining synchronization between a CMTS core and an RPD, where both the core and the RPD are configured for individual synchronization in a slave configuration to a common grandmaster clock.

A method for exchanging a clock synchronization packet performed by a network apparatus, including: exchanging a clock synchronization packet with a first clock source, where the network apparatus includes a boundary clock; determining a first time deviation of the boundary clock relative to the first clock source according to the clock synchronization packet exchanged with the first clock source, where the boundary clock avoids performing an operation of calibrating a time of a local clock of the boundary clock according to the first time deviation; and sending a clock synchronization packet to a first slave clock of the boundary clock, where the clock synchronization packet includes a first timestamp, a value of the first timestamp is equal to a first corrected value, and the first corrected value is a value obtained by the boundary clock by correcting the time of the local clock by using the first time deviation.

A signal transfer management apparatus manages operations of a plurality of signal transfer devices in a system in which the signal transfer devices forming a packet network transmit and receive time synchronization messages including time information between a master device having a reference time and a plurality of slave devices. The signal transfer management apparatus includes a gate calculation unit configured to calculate a gate start time of each of uplink time gates and a gate start time of each of downlink time gates of the plurality of signal transfer devices and open each of the time gates, a comparison unit configured to compare uplink time synchronization messages from the plurality of slave devices to the master device and detect a conflict between the uplink time synchronization messages, and an offset unit configured to, when the comparison unit detects the conflict between the uplink time synchronization messages of the signal transfer devices, adjust the a gate start time of each of the uplink time gates and the a gate start time of each of the downlink time gates of the signal transfer devices and set the adjusted gate start time in the signal transfer devices. Thus, it is possible to avoid conflict between time synchronization messages without decreasing the time synchronizing accuracy.