A pixel region includes: pixels each including a plurality of photoelectric conversion devices; a light-shielding region; and an effective region. A reading circuit reads, from a first row of the pixel region, a pixel signal obtained by adding signals of the plurality of photoelectric conversion devices, and reads, from a second row of the pixel region, a plurality of signals including phase difference information. A horizontal streak correction circuit performs one of a first offset correction based on a signal read from the light-shielding region and a second offset correction based on a predetermined value on a pixel signal obtained from a second row of the effective region. An image processing circuit processes image data according to a parameter. The horizontal streak correction circuit selects the first offset correction or the second offset correction according to the parameter.

A pixel region includes: pixels each including a plurality of photoelectric conversion devices; a light-shielding region; and an effective region. A reading circuit reads, from a first row of the pixel region, a pixel signal obtained by adding signals of the plurality of photoelectric conversion devices, and reads, from a second row of the pixel region, a plurality of signals including phase difference information. A horizontal streak correction circuit performs one of a first offset correction based on a signal read from the light-shielding region and a second offset correction based on a predetermined value on a pixel signal obtained from a second row of the effective region. An image processing circuit processes image data according to a parameter. The horizontal streak correction circuit selects the first offset correction or the second offset correction according to the parameter.

An image sensor includes a pixel array that includes a plurality of pixels, and a row driver. Each pixel includes a photodiode, a transfer gate transistor between the photodiode and a floating diffusion node, and a first transistor between the floating diffusion node and a first voltage node configured to receive a first voltage. The row driver is connected with rows of the pixels through row lines. For each pixel of a selected row among the rows, the row driver is configured to apply a second voltage to a gate of the first transistor such that the first transistor is turned on and the floating diffusion node is reset, and turn on the transfer gate transistor such that electrons integrated in the photodiode are dumped to the floating diffusion node.

An imaging pixel to mitigate cross-talk effects comprises a voltage supply node to receive a supply voltage, and an output node to provide a pixel output signal. The imaging pixel further comprises a photosensitive element, and a source follower transistor having a control node coupled to the photosensitive element. The source follower transistor is interposed between the voltage supply node and the output node. The imaging pixel comprises a clamping circuit being interposed between the voltage supply node and the output node.

A comparator may include: a comparison block suitable for comparing a ramp signal and a pixel signal and outputting a comparison signal; and a gain acquisition and noise reduction block suitable for amplifying the comparison signal outputted from the comparison block to acquire a gain and reduce an occurrence of noise.

Provided are a solid-state image sensor and an electronic information device capable of effectively reducing the occurrence of pseudo-smear by adopting a simple configuration and operation. A solid-state image sensor 1 includes multiple pixel circuit units P.sub.N and P.sub.OB, each including a photoelectric conversion unit that generates charges via photoelectric conversion and accumulates the generated charges, a floating diffusion unit that retains charges transferred from the photoelectric conversion unit, a transfer unit through which charges accumulated by the photoelectric conversion unit are transferred to the floating diffusion unit, an output unit that outputs a signal corresponding to the amount of charges retained by the floating diffusion unit, and a reset unit that discharges charges retained by the floating diffusion unit to the outside; and an A/D conversion unit 23 that acquires a signal output from the output unit and performs A/D conversion on the acquired signal using a set gain. At least one of the pixel circuit units P.sub.N and P.sub.OB is configured such that charges transferred from the photoelectric conversion unit to the floating diffusion unit and retained by the floating diffusion unit are limited so as not to exceed an upper limit amount which is set to be smaller by the extent of an increase in the gain.

A comparator may include: a comparison block suitable for comparing a ramp signal and a pixel signal and outputting a comparison signal; and a gain acquisition and noise reduction block suitable for amplifying the comparison signal outputted from the comparison block to acquire a gain and reduce an occurrence of noise.

An electronic circuit includes a unit pixel, a first clamp circuit, and a second clamp circuit. The unit pixel outputs a voltage having an output voltage level at a first output voltage level in a first time interval and at a second output voltage level in a second time interval different from the first time interval. The first clamp circuit is configured to clamp the output voltage level from the unit pixel to a first voltage level responsive to the first output voltage level being not greater than the first voltage level in the first time interval. The second clamp circuit is configured to clamp the output voltage level from the unit pixel to a second voltage level responsive to the second output voltage level being not greater than the second voltage level in the second time interval.

A solid-state imaging device comprises a photodetecting section, an unnecessary carrier capture section, and a vertical shift register. The unnecessary carrier capture section has carrier capture regions arranged in a region between the photodetecting section and the vertical shift register for respective rows. Each of the carrier capture regions includes a transistor and a photodiode. The transistor has one terminal connected to the photodiode and the other terminal connected to a charge elimination line. The charge elimination line is short-circuited to a reference potential line.

An imaging device comprising a pixel substrate including pixel element circuitry, a logic substrate including read circuitry configured to receive an output signal voltage from the pixel element circuitry, and electrically-conductive material arranged between the pixel substrate and the logic substrate, wherein the electrically-conductive material is configured to transfer at least one reference voltage from the logic substrate to the pixel substrate, wherein the electrically-conductive material comprises a CuCu bonding portion.