Patent classifications
H05K2201/10727
TRANSPARENT PACKAGE FOR USE WITH PRINTED CIRCUIT BOARDS
A blank package for mimicking an electronic component package comprises a body and a plurality of conductive pads. The body is formed from generally transparent electrically insulating material and has a top surface, a bottom surface, and a plurality of side surfaces. The bottom surface has a shape and dimensions that are similar to a bottom surface of the electronic component package. The conductive pads are formed from electrically conductive material and attached to the body, with each conductive pad corresponding to a successive one of the conductive pads of the electronic component package. Each conductive pad has features that are similar to features of the corresponding conductive pad of the electronic component package.
SEALED INTERFACE POWER MODULE HOUSING
A number of different sealed interfaces for power modules are described. In one example, a sealed interface includes a printed circuit board including a contact pad for power conduction to a bus bar of the printed circuit board, a semiconductor module including at least one power transistor, a terminal pin electrically coupled to the power module, and a housing for the power module. The housing includes an open terminal aperture that extends through the housing. The printed circuit board is seated upon the open terminal aperture, to close and seal the open terminal aperture, with the contact pad positioned within the open terminal aperture. The terminal pin contacts the contact pad of the printed circuit board within the open terminal aperture, and the open terminal aperture comprises a transitional feature to abate electric field intensity around an interface between the open terminal aperture and the printed circuit board.
DISPLAY MODULE AND ELECTRONIC DEVICE INCLUDING THE SAME
An electronic device is provided. The electronic device includes a display panel, a first connection member on which a display driver integrated circuit (DDIC) configured to control the display panel is disposed, a first contact point part disposed on the first connection member, a second contact point part spaced apart from the first contact point part in a second direction perpendicular to the first direction and disposed on the first contact point part, a second connection member disposed adjacent to the first connection member, a third contact point part arranged in the first direction and is disposed on the first layer of the second connection member to be connected to the first contact point part, and a fourth contact point part arranged in the first direction and is arranged on the second layer of the second connection member to be connected to the second contact point part.
NITRIDE-BASED SEMICONDUCTOR MODULE AND METHOD FOR MANUFACTURING THE SAME
The present disclosure provides a semiconductor module comprising a semiconductor device removably pressed-fit in a cavity formed in a printed circuit board and methods for manufacturing the same. The semiconductor device and the cavity of the printed circuit board can cooperate with each other and act as an electrical plug and an electrical socket respectively. Soldering the semiconductor device on the printed circuit board can be avoided. Therefore, the packaging process can be more flexible and reliability issues with solder joints can be eliminated. Moreover, heatsink can be mounted on top and/or bottom of the semiconductor device after being received in the cavity of the printed circuit board. Thermal dissipation efficiency can be greatly enhanced.
SEMICONDUCTOR PACKAGE WITH STRESS REDUCTION DESIGN AND METHOD FOR FORMING THE SAME
A semiconductor package and a method of forming the same are provided. The semiconductor package includes a package substrate, a semiconductor device, an underfill element, and a groove. The semiconductor device is bonded to the surface of the package substrate through multiple electrical connectors. The underfill element is formed between the semiconductor device and the surface of the package substrate to surround and protect the electrical connectors. The underfill element includes a fillet portion that extends laterally beyond the periphery of the semiconductor device and is formed along the periphery of the semiconductor device. The groove is formed in the fillet portion and spaced apart from the periphery of the semiconductor device.
MODULE AND COMPONENT
A module includes: a substrate including a first surface and including first and second sides; a component as a first component mounted on the first surface; a first sealing resin arranged to cover the first surface and the first component; and a first shield film. An inclined portion is formed in the substrate. The substrate includes a first lead electrode arranged to be exposed to the inclined portion along the first side, and a second lead electrode arranged to be exposed to the inclined portion along the second side, and each of these is connected to the first shield film. A height of the second lead electrode is different from a height of the first lead electrode.
Solder void reduction between electronic packages and printed circuit boards
An apparatus includes a printed circuit board. The printed circuit board includes at least one conductive layer on top a first dielectric layer, wherein the at least one conductive layer comprises at least one of a ground plane and a power plane. The printed circuit board includes a second dielectric layer on top of the at least one conductive layer. The printed circuit board includes a thermal pad on top of the second dielectric layer. The printed circuit board is fabricated by forming at least one plated through hole for electrically coupling the thermal pad to the at least one conductive layer. The printed circuit board is fabricated by backdrilling the at least one plated through hole to remove a portion of the conductive material, wherein subsequent to the backdrilling the conductive material remaining in the at least one plated through hole electrically couples one or more of the at least one conductive layer to the thermal pad.
PACKAGE, METHOD FOR FORMING A PACKAGE, CHIP CARD, AND METHOD FOR FORMING A CHIP CARD
A package including an electronic leadless module having a top side, a bottom side and side faces between the top side and the bottom side, the electronic leadless module having an electronic circuit, a plurality of electrical contact pads at the bottom side of the electronic leadless module which are electrically conductively coupled to the electronic circuit, and encapsulation material which partially encapsulates the electronic circuit, wherein the electrical contact pads are at least partially free from encapsulation material and the electronic leadless module have an anchoring region on at least one side face. The package may also include a carrier frame which carries the electronic leadless module, with the side face extending further in the direction of the carrier frame below the anchoring region than in the anchoring region, and filler material in the anchoring region for fastening the electronic leadless module to the carrier frame.
Wiring substrate, electronic device, and electronic module
A wiring substrate comprises an insulating substrate and an external electrode on the insulating substrate. The insulating substrate comprises a lateral surface comprising a cutout. The cutout extends to a lower surface of the insulating substrate. The external electrode extends from an inner surface of the cutout to the lower surface of the insulating substrate. The insulating substrate comprises a protrusion at a lower end portion of the inner surface of the cutout. The protrusion protrudes from the inner surface of the cutout toward the lateral surface of the insulating substrate.
Circuit board
The disclosure provides a circuit board that includes: a carrier element having a number of circuit board layers; a number of electronic components; a number of thermal interfaces; and a number of electrical interfaces. The electronic components are arranged directly on at least one of the surface sides on the carrier element. The opposite surface side of the carrier element is of potential-free design. Additionally, the circuit board with the electronic components is overlaid by a covering material in such a way that the electronic components are mechanically stabilized and the thermal and/or electrical interfaces are free of the covering material.