A method may include obtaining a printed circuit board (PCB) that includes a set of vias that include a set of stub regions. The PCB may include a set of layers perpendicular to the set of vias. The set of layers may include a signal layer and a ground layer. The ground layer may be located between the set of stub regions and the signal layer. The method may include drilling to remove at least a portion of a stub region of a via of the set of vias. The method may include performing an electrical test to determine whether a sliver of conductive material is included within the via after drilling to remove the at least a portion of the stub region of the via.

The present invention provides a method for detecting and adjusting failed back-drills in PCBs in the process of fabricating a PCB so that the failed back-drill can be screened out or repaired. This is accomplished, by after detecting poor back drills in a PCB, measuring the actual thickness of each PCB board. Next, the measured actual thickness of each PCB board is compared with .the theoretical thickness of each PCB board. The back drill depth for each area of the PCB board is then adjusted for its theoretical thickness and percent variation from the measured thickness.to adjust the poor back drill.

A board drilling apparatus, drill bit, and method for board drilling apparatus to drill a board. The board drilling apparatus (4) is configured to drill a board comprising at least a target conductive layer (13), an insulation layer, and a hole (3) covered with conductive material through at least part of the board in thickness, to remove at least part of the conductive material, the board drilling apparatus (4) comprising a drill bit (41) and a controller (43): the drill bit (41) comprising an insulation part (412) at least in center of end of the drill bit (41) and a conductive part (411) at least on edge of the end of the drill bit (41), arranged to enable only the insulation part (412) to be in touch with the conductive material of the hole (3) when the board drilling apparatus (4) is drilling the board, and arranged to enable the conductive part to get in touch with the target conductive layer (13) once the conductive material on the way to the target conductive layer (13) has just been removed; and the controller (43) configured to stop drilling when receiving an electrical signal occurred in response to the drill bit touching the target conductive layer of the board.

A circuit board may include a plurality of electrically-conductive layers separated and supported by layers of insulating material laminated together and a via electrically coupled to a first layer of the circuit board and coupled to a second layer of the circuit board, the via comprising a first via portion comprising electrically-conductive material and having a first diameter and a first depth from a surface of the circuit board and a second via portion comprising electrically-conductive material and having a second diameter smaller than the first diameter and a second depth from the first depth.

The method for removing partial metal wall of hole of the present invention includes the following steps. First, a circuit board is provided. The circuit board includes a plurality of circuit layers, a plurality of dielectric layers, and a plated through hole. Each of the dielectric layers is between two adjacent circuit layers. The wall of the plated through hole includes at least one residual copper. The circuit layer immediately below the residual copper is defined as a signal layer. Next, a position of the signal layer and a position of the residual copper in the plated through hole are obtained. Next, a drill is provided, the drill includes a main body and at least one needle, and the drill is moved to the position of the residual copper. The main body is rotated around the central axis of the main body, so the needle can remove part of the residual copper.

Embodiments provide a multilayer printed circuit board intended to connect electronic components, the board comprising a stack of a plurality of conductive layers, the conductive layers comprising two surface layers and one or more internal layers, the board comprising one or more counterbored holes, each counterbored hole comprising a portion with metallization opening onto one of the two surface layers and a portion without metallization opening onto the other surface layer; the multilayer printed circuit board may advantageously comprise one or more metal pads, each metal pad being joined to one of the two surface layers so as to occult the portion without metallization of a corresponding counterbored hole.

Carrier board structure with an increased core-layer trace area and method for manufacturing the same are introduced. The carrier board structure comprises a core layer structure, a first circuit build-up structure, and a second circuit build-up structure. The core layer structure comprises a core layer, a signal transmission portion, and an embedded circuit layer, wherein the signal transmission portion and the embedded circuit layer are disposed inside the core layer and electrically connected. The first circuit build-up structure is disposed on the core layer on a same side as the embedded circuit layer and is electrically connected to the embedded circuit layer. The second circuit build-up structure is disposed on the core layer on a same side as the signal transmission portion, and is electrically connected to the first circuit build-up structure through the signal transmission portion and the embedded circuit layer.

The present invention relates to an embedded printed circuit board including: an insulation substrate including a cavity; a sensor device disposed on the cavity; an insulating layer disposed on the insulation substrate, having an opening part exposing the sensor device; and a pad part disposed on the lower surface of the opening part exposing the sensor device.

A method of manufacturing a component carrier includes laser drilling a blind hole in a layer stack, and subsequently extending the blind hole to a through hole by etching. A component carrier includes an electrically insulating layer structure, an electrically conductive layer structure directly on an electrically insulating layer structure, and a tapering through hole extending through the electrically conductive layer structure and through the electrically insulating layer structure with a lateral overhang of the electrically conductive layer structure beyond the electrically insulating layer structure at the tapering through hole of not more than 20% of a maximum diameter of the tapering through hole.

A PCB, printed circuit board, structure for forming at least one embedded electronic component. The structure comprises a multi-layer PCB board comprising at least one through-hole via, the via comprising a plurality of electrodes vertically aligned within the via, each electrode comprising a plated ring; and an isolation section separating each of the electrodes.