Multifunctional surfacing materials for use in composite structures are disclosed. According to one embodiment, the surfacing material includes (a) a stiffening layer, (b) a curable resin layer, (c) a conductive layer, and (d) a nonwoven layer, wherein the stiffening layer (a) and the nonwoven layer (d) are outermost layers, and the exposed surfaces of the outermost layers are substantially tack-free at room temperature (20° C. to 25° C.). The conductive layer may be interposed between the curable resin layer and the stiffening layer or embedded in the curable resin layer. According to another embodiment, the surfacing material includes a fluid barrier film between two curable resin layers. The surfacing materials may be in the form of a continuous or elongated tape that is suitable for automated placement.

A method of manufacturing a transparent electrode substrate according to an exemplary embodiment of the present application comprises: forming a structure comprising a transparent base, a bonding layer provided on the transparent base, and a metal foil provided on the bonding layer; forming a metal foil pattern by patterning the metal foil; heat-treating the structure comprising the metal foil pattern at a temperature of 70° C. to 100° C.; and completely curing the bonding layer.

A flexible printed circuit board includes a base film having an insulating property and a conductive pattern laminated on one surface of the base film, and has a terminal connecting area toward one end edge of the conductive pattern, the flexible printed circuit board including a reinforcement member laminated on an opposite surface of the base film and situated at least at a position opposite the terminal connecting area, wherein the reinforcement member has one or more lines of hollow holes aligning with a width direction thereof.

Electrolytic Etching/Deposition System. A system for continuous circuit fabrication comprising means for storing and dispensing the substrate, means for laminating the substrate, means for printing the substrate, means for optical inspection of the substrate, means for photolithography of the substrate, means for drying the substrate, means for developing the substrate, means for washing the substrate and means for electroplating the substrate.

Electrolytic Etching/Deposition System. A system for continuous circuit fabrication comprising means for storing and dispensing the substrate, means for laminating the substrate, means for printing the substrate, means for optical inspection of the substrate, means for photolithography of the substrate, means for drying the substrate, means for developing the substrate, means for washing the substrate and means for electroplating the substrate.

A package substrate, comprising a package comprising a substrate, the substrate comprising a dielectric layer, a via extending to a top surface of the dielectric layer; and a bond pad stack having a central axis and extending laterally from the via over the first layer. The bond pad stack is structurally integral with the via, wherein the bond pad stack comprises a first layer comprising a first metal disposed on the top of the via and extends laterally from the top of the via over the top surface of the dielectric layer adjacent to the via. The first layer is bonded to the top of the via and the dielectric layer, and a second layer is disposed over the first layer. A third layer is disposed over the second layer. The second layer comprises a second metal and the third layer comprises a third metal. The second layer and the third layer are electrically coupled to the via.

A method for manufacturing a printed circuit board according to one embodiment of the present invention includes a step of forming a resist pattern, and a step of forming a conductive pattern by using the resist pattern. The resist pattern has an acute angle portion in which an outer edge of a resist is bent to form an acute angle in a plan view. In a corner portion of the acute angle portion, an outer-side outer edge of the resist is rounded, and a radius of curvature of the outer-side outer edge is more than or equal to a distance from the outer-side outer edge to another outer edge adjacent thereto in a direction away from a center of curvature of the outer-side outer edge.

A method for manufacturing a printed circuit board according to one embodiment of the present invention includes a step of forming a resist pattern, and a step of forming a conductive pattern by using the resist pattern. The resist pattern has an acute angle portion in which an outer edge of a resist is bent to form an acute angle in a plan view. In a corner portion of the acute angle portion, an outer-side outer edge of the resist is rounded, and a radius of curvature of the outer-side outer edge is more than or equal to a distance from the outer-side outer edge to another outer edge adjacent thereto in a direction away from a center of curvature of the outer-side outer edge.

A method for manufacturing a printed circuit board according to one embodiment of the present invention includes a step of forming a resist pattern, and a step of forming a conductive pattern by using the resist pattern. The resist pattern has an acute angle portion in which an outer edge of a resist is bent to form an acute angle in a plan view. In a corner portion of the acute angle portion, an outer-side outer edge of the resist is rounded, and a radius of curvature of the outer-side outer edge is more than or equal to a distance from the outer-side outer edge to another outer edge adjacent thereto in a direction away from a center of curvature of the outer-side outer edge.

A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.