Patent classifications
H05K3/185
Method for photolithography to manufacture a two-sided touch sensor
A touch sensor having conductive circuits on both surfaces of a substrate is fabricated by including UV-blocking material into the substrate or depositing UV-blocking layer on the substrate. This can be used for fabricating sensors having transparent conductor circuits, or having metallic circuits, which are opaque to visible light. Photoresist is applied to both surfaces of the substrate and patterns are transferred to the photoresist by exposure to UV radiation. The UV-blocking layer prevents UV-radiation applied to one side from exposing the opposite side. If desired, both photoresist layers may be exposed simultaneously by splitting one UV beam.
SYSTEMS AND METHODS FOR MANUFACTURING
Various inventions are disclosed in the microchip manufacturing arts. Conductive pattern formation by semi-additive processes are disclosed. Further conductive patterns and methods using activated precursors are also disclosed. Aluminum laminated surfaces and methods of circuit formation therefrom are further disclosed. Circuits formed on an aluminum heat sink are also disclosed. The inventive subject matter further discloses methods of electrolytic plating by controlling surface area of an anode.
Component Carrier Interconnection and Manufacturing Method
A component carrier assembly includes a first component carrier having a first electrically insulating layer structure and a via in the first electrically insulating layer structure, where the via is at least partially filled with electrically conductive material and where an upper part of the via extends beyond an outer main surface of the first component carrier; and a second component carrier having a second electrically insulating layer structure, and an electrically conductive adhesive material that is at least partially embedded in the second electrically insulating layer structure. The first component carrier and the second component carrier are interconnected and the upper part of the via at least partially penetrates into the electrically conductive adhesive material.
Circuit Board Traces in Channels using Electroless and Electroplated Depositions
A circuit layer is formed by drilling vias and forming channels in a circuit layer which has catalytic particles exposed on the surfaces, channels, and vias. A first flash electroless deposition is followed by application of dry film, followed by selective laser ablation of the dry film channels and vias. A second electroless solution is applied which provides additional deposition over the first flash electroless deposition but only on the vias and trace channel areas. An electrodeposition follows, using the first deposition as a cathode. The dry film is stripped and the first electroless layer is etched, leaving only depositions in the channels and vias.
Laser direct structuring of switches
Methods and systems for creating a device having a switch trace are disclosed. The systems and methods described herein may include a device that has a chassis, the chassis having a top and a bottom, at least one antenna affixed to the top of the chassis, a first laser direct structuring-fabricated (LDS) trace, a second LDS trace, and a button, the button connected to the first LDS trace and the top of the chassis, wherein the button is configured to contact the second LDS trace when the button is depressed and complete a circuit between the first LDS trace and the second LDS trace upon contact.
Catalytic laminate with conductive traces formed during lamination
A circuit board is formed from a catalytic laminate having a resin rich surface with catalytic particles dispersed below a surface exclusion depth. Trace channels and apertures are formed into the catalytic laminate, electroless plated with a metal such as copper, filled with a conductive paste containing metallic particles, which are then melted to form traces. In a variation, multiple circuit board layers have channels formed into the surface below the exclusion depth, apertures formed, are electroless plated, and the channels and apertures filled with metal particles. Several such catalytic laminate layers are placed together and pressed together under elevated temperature until the catalytic laminate layers laminate together and metal particles form into traces for a multi-layer circuit board.
Electronic device having a housing with embedded antenna
Electronic device having at least one main antenna (1) where such antenna is formed as a conductive layer on walls of a housing (10) of the electronic device through a laser direct structuring process and has a first portion (2, 3) on an internal part of the housing, a second portion (4) forming a junction area on an edge between an interior part and an exterior part of the housing and a third portion (5) on an outer part of the housing in electrical continuity with the first portion through the junction area.
ELECTRONIC MODULE, IMAGE PICKUP UNIT, AND ENDOSCOPE
An electronic module includes: a mount table including a first electrode mounting surface on which an electronic component is mounted; a plurality of electrode mount parts that are formed in the mount table and at which lands corresponding to a plurality of respective electrodes of the electronic component are formed on the first electrode mounting surface; a step part located between the plurality of electrode mount parts and including a predetermined step relative to the first electrode mounting surface of the mount table; and a solder withdrawing part at which an end part of a corresponding one of the lands is extended to the step part or a side surface of the mount table.
Electroless and electrolytic deposition process for forming traces on a catalytic laminate
A process for making a circuit board modifies a catalytic laminate having a resin rich surface with catalytic particles dispersed below a surface exclusion depth. The catalytic laminate is subjected to a drilling and resin-rich surface removal operation to expose the catalytic particles, followed by an electroless plating operation which deposits a thin layer of conductive material on the surface. A photo-masking step follows to define circuit traces, after which an electro-plating deposition occurs, followed by a resist strip operation and a quick etch to remove electroless copper which was previously covered by photoresist.
LASER-DIRECT STRUCTURING OF POLYMERIC FILMS AND SHEETS AND METHODS OF MAKING
This disclosure relates to materials prepared using a laser-direct structuring (LDS) method. The LDS materials of the present disclosure comprise polymeric film or polymeric sheet structures containing a LDS additive and which can undergo laser-direct structuring and chemical plating to form conductive paths on their surface. The present disclosure finds use, for example, in the automotive, electronics, RFID, communications, and medical device industries.