H05K3/4697

Circuit board with heat dissipation function and method for manufacturing the same

A circuit board with improved heat dissipation function and a method for manufacturing the circuit board are provided. The method includes providing a first metal layer defining a first slot; forming a first adhesive layer in the first slot; electroplating copper on each first pillar to form a first heat conducting portion; forming a first insulating layer on the first adhesive layer having the first heat conducting portion, and defining a first blind hole in the first insulating layer; filling the first blind hole with thermoelectric separation metal to form a second heat conducting portion; forming a first wiring layer on the first insulating layer; forming a second insulating layer on the first wiring layer, defining a second blind hole on the second insulating layer; electroplating copper in the second blind hole to form a third heat conducting portion; mounting an electronic component on the second insulating layer.

Manufacturing Component Carrier With Cavity By Trimming Poorly Adhesive Structure Before Removing Stack Material
20230041145 · 2023-02-09 ·

A method of manufacturing a component carrier includes forming a poorly adhesive structure on at least one layer structure, thereafter removing part of the poorly adhesive structure to thereby define a lateral limit of the poorly adhesive structure, thereafter attaching at least one further layer structure to the at least one layer structure and to the poorly adhesive structure, and forming a cavity by removing material of the at least one further layer structure above the poorly adhesive structure.

Component Carrier With Different Stack Heights and Vertical Opening and Manufacturing Methods
20230043085 · 2023-02-09 ·

A component carrier includes a stack with at least one electrically conductive layer structure and at least one electrically insulating layer structure. The stack has at least one central stack section, at least one cavity stack section, and at least one vertical opening formed in the cavity stack section. The cavity stack section at least partially surrounds the central stack section, and the thickness of the central stack section is greater than the thickness of the cavity stack section.

PACKAGE CARRIER AND MANUFACTURING METHOD OF PACKAGE CARRIER
20180005949 · 2018-01-04 · ·

A package carrier including a flexible substrate, a first build-up structure and a second build-up structure is provided. The flexible substrate has a first surface and a second surface opposite to each other, and has a first opening connected between the first surface and the second surface. The first build-up structure is disposed on the first surface and covers the first opening. The second build-up structure is disposed on the second surface and has a second opening, and the first opening and the second opening are connected to each other to form a chip accommodating cavity together. In addition, a manufacturing method of the package carrier and a chip package structure having the package carrier are also provided.

MANUFACTURING PROCEDURE FOR LABORATORY INTEGRATED ON A CHIP

Laboratory on chip and its layered manufacturing method, wherein the method includes: designing, by means of a computer program, a printed circuit (7), mixing and reaction cavities (3) of fluids, microchannels (2) and spaces (15) for the placement of electronic components to be found in each layer, mechanizing in one or more biocompatible substrates the different voids and passages that will make up the mixing and reaction cavities (3), microchannels (2), holes (8) that join the microchannels and spaces for the subsequent placement of electronic components (15), metallizing with a biocompatible conductive material those surfaces in which the printed circuit will be integrated (7) according to the design performed in the first step, generating the printed circuit (7) by photolithography and acid attack, bonding the electronic components in the corresponding spaces (15), joining all the layers that make up the final laboratory.

METHOD OF MANUFACTURING WIRING SUBSTRATE
20230239998 · 2023-07-27 ·

A wiring substrate includes a first insulating layer with a first opening, a second insulating layer with a second opening, a high-frequency wiring layer, a first wiring layer, a second wiring layer, and a plurality of conductive pillars. The high-frequency wiring layer including a high-frequency trace is sandwiched between the first insulating layer and the second insulating layer. The first opening and the second opening expose two sides of the high-frequency trace respectively. The high-frequency trace has a smooth surface which is not covered by the first insulating layer and the second insulating layer and has the roughness ranging between 0.1 and 2 μm. The first insulating layer and the second insulating layer are all located between the first wiring layer and the second wiring layer. The conductive pillars are disposed in the second insulating layer and connected to the high-frequency trace.

Method for contacting and rewiring an electronic component embedded into a printed circuit board

A method for contacting and rewiring an electronic component embedded in a PCB in the following manner is disclosed. A first permanent resist layer is applied to one contact side of the PCB. The first permanent resist layer is structured to produce exposures in the area of contacts of the electronic component. A second permanent resist layer is applied onto the structured first permanent resist layer. The second permanent resist layer is structured to expose the exposures in the area of the contacts and to produce exposures in line with the desired conductor tracks. The exposures are chemically coated with copper the copper is electric-plated to the exposures. Excess copper in the areas between the exposures is removed.

Component embedded in component carrier and having an exposed side wall

A component carrier including a stack with a plurality of electrically insulating layer structures and/or a plurality of electrically conductive layer structures, and a component embedded in the stack, wherein at least a portion of a side wall of the component is exposed.

TRANSMISSION BOARD TO CARRY ELECTROMAGNETIC WAVE WITHOUT LEAKAGE AND METHOD FOR MANUFACTURING SAME
20230025696 · 2023-01-26 ·

An electromagnetic wave transmission board proofed against internal signal leakage includes an inner plate, a first outer plate, a second outer plate, a first plate bump, a first conductive bump, a second plate bump, and a second conductive bump. The inner plate defines a first through hole with a plated metal layer on the hole wall. The first and second plated bumps are disposed between the first outer and inner plates. The second plate bump and the second conductive bump are disposed between the second outer plate and the inner plate. The plate metal layer, the first plate bump, the first conductive bump, the first outer plate, the second outer plate, the second conductive bump, and the second plated bump jointly form an air-filled chamber. A method for manufacturing the electromagnetic wave transmission board is also provided.

METHOD FOR MANUFACTURING A PACKAGING SUBSTRATE, AND PACKAGING SUBSTRATE
20230232545 · 2023-07-20 ·

A method for manufacturing a packaging substrate, and a packaging substrate are disclosed. The method includes: providing a bottom board with a first circuit layer, the first circuit layer being provided with at least one demand point, and one side of the demand point being provided with a first to-be-avoided region; machining a first intermediate insulating layer on the bottom board, the first intermediate insulating layer including a first intermediate insulating dielectric covering the first to-be-avoided region; machining a first intermediate wiring layer on the first intermediate insulating layer, the first intermediate wiring layer including a first intermediate circuit partially arranged on the first intermediate insulating dielectric and connected to the demand point; machining a first insulating layer on the first intermediate wiring layer which is stacked on the bottom board and covers the first intermediate wiring layer; and machining a circuit build-up layer on the first insulating layer.