Conductive Structures, Assemblies Having Vertically-Stacked Memory Cells Over Conductive Structures, and Methods of Forming Conductive Structures

Abstract

Some embodiments include a conductive structure of an integrated circuit. The conductive structure includes an upper primary portion, with the upper primary portion having a first conductive constituent configured as a container. The container has a bottom, and a pair of sidewalls extending upwardly from the bottom. An interior region of the container is over the bottom and between the sidewalls. The upper primary portion includes a second conductive constituent configured as a mass filling the interior region of the container. The second conductive constituent is a different composition than the first conductive constituent. One or more conductive projections join to the upper primary portion and extend downwardly from the upper primary portion. Some embodiments include assemblies comprising memory cells over conductive structures. Some embodiments include methods of forming conductive structures.

Claims

1-28. (canceled)

29. A conductive structure of an integrated circuit, comprising: a conductive container having a bottom and having a pair of sidewalk extending upwardly from the bottom; a conductive projection extending downwardly from the bottom of the conductive container; an interior region defined by the bottom and sidewalk of the conductive container; and a conductive mass filling the interior region, the conductive mass comprising a different composition than the conductive container.

30. The conductive structure of claim 29 wherein the conductive mass comprises at least one conductive material.

31. The conductive structure of claim 29 wherein the conductive mass comprises only one conductive material.

32. The conductive structure of claim 29 wherein the conductive mass comprises at least two conductive materials.

33. The conductive structure of claim 29 wherein the conductive mass comprises at least three conductive materials.

34. The conductive structure of claim 29 wherein the conductive mass comprises only three conductive materials.

35. The conductive structure of claim 29 wherein the interior region is only defined by the bottom and sidewalls of the conductive container.

36. The conductive structure of claim 29 wherein the interior region defined by the bottom and sidewalls of the conductive container comprises a first portion of the interior region, and further comprising a second portion of the interior region defined by the conductive projection.

37. The conductive structure of claim 36 wherein the conductive mass fills the second portion of the interior region.

38. The conductive structure of claim 37 wherein the conductive mass comprises at least one conductive material filling the second portion of the interior region.

39. The conductive structure of claim 37 wherein the conductive mass comprises only one conductive material filling the second portion of the interior region.

40. The conductive structure of claim 37 wherein the conductive mass comprises at least two conductive materials filling the second portion of the interior region.

41. The conductive structure of claim 37 wherein the conductive mass comprises only two conductive materials filling the second portion of the interior region.

42. The conductive structure of claim 29 wherein the conductive projection comprises two conductive projections extending downwardly from the bottom of the conductive container.

43. The conductive structure of claim 42 wherein the two conductive projection define arcuate corners with the conductive container.

44. The conductive structure of claim 29 wherein the conductive projection defines sharp corners with the conductive container.

45. The conductive structure of claim 29 wherein the conductive projection defines arcuate corners with the conductive container.

46. The conductive structure of claim 29 further comprising a planarized upper surface extending across the conductive container and the conductive mass.

47. The conductive structure of claim 29 wherein the conductive container comprises a metal and the conductive mass comprises a semiconductor material.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] FIG. 1 shows a block diagram of a prior art memory device having a memory array with memory cells.

[0016] FIG. 2 shows a schematic diagram of the prior art memory array of FIG. 1 in the form of a 3D NAND memory device.

[0017] FIG. 3 shows a cross sectional view of the prior art 3D NAND memory device of FIG. 2 in an X-X′ direction.

[0018] FIG. 4 is a schematic of a prior art NAND memory array.

[0019] FIG. 5 is a diagrammatic cross-sectional view of a region of an example assembly comprising an example arrangement of memory cells over an example conductive structure.

[0020] FIG. 6 is a diagrammatic top view of the example conductive structure of FIG. 5. FIGS. 6A and 6B are diagrammatic cross-sectional views along the lines A-A and B-B of FIG. 6, respectively.

[0021] FIGS. 6B-1, 6B-2, 6B-3 and 6B-4 are diagrammatic cross-sectional views along the line B-B of FIG. 6 showing example configurations and arrangements of materials in some example embodiments.

[0022] FIG. 7 is a diagrammatic cross-sectional top view of another example conductive structure.

[0023] FIGS. 7A-1 and 7A-2 are diagrammatic cross-sectional views along the line A-A of FIG. 7 showing example configurations in a pair of example embodiments.

[0024] FIG. 8 is a diagrammatic cross-sectional top view of another example conductive structure. FIGS. 8A and 8B are diagrammatic cross-sectional views along the lines A-A and B-B of FIG. 8, respectively.

[0025] FIGS. 9-14 are diagrammatic cross-sectional views of a region of an example construction at example process stages of an example method for fabricating an example arrangement of memory cells.

DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTS

[0026] Some embodiments include conductive structures having a doped semiconductor mass within a conductive container. The conductive container may comprise metal. In some embodiments, the conductive container includes one or more projections which may be utilized to electrically couple the conductive container with other circuitry. In some embodiments, conductive structures may be configured as source lines within a NAND memory array. Example embodiments are described with reference to FIGS. 5-14.

[0027] Referring to FIG. 5, a region of an assembly 10 is illustrated. The assembly 10 includes a plurality of vertically-stacked memory cells 12. Such memory cells may be NAND memory cells, and may be part of a NAND memory array.

[0028] The memory cells include channel material 14, tunneling material 15, charge-storage material 16, and charge-blocking material 18.

[0029] The channel material 14 is configured as vertically-extending channel material pillars 20. In the illustrated embodiment, the pillars 20 are “hollow” in that they have voids 22 extending therein. Such voids are filled with insulative material 24. In other embodiments, the pillars 20 may be solid rather than being in the illustrated hollow configuration.

[0030] The memory cells 12 may be considered to be arranged along the channel material pillars 20.

[0031] The channel material 14 may comprise any suitable composition(s); and in some embodiments may comprise one or more of silicon, germanium, III/V semiconductor materials (e.g., gallium phosphide), semiconductor oxides, etc.

[0032] The tunneling material 15 is sometimes referred to as gate dielectric. The tunneling material 15 may comprise any suitable composition(s); and in some embodiments may comprise, for example, one or more of silicon dioxide, aluminum oxide, hafnium oxide, zirconium oxide, etc.

[0033] The charge-storage material 16 may comprise any suitable composition(s); and in some embodiments may comprise charge-trapping materials, such as silicon nitride, silicon oxynitride, conductive nanodots, etc. In alternative embodiments (not shown), charge-storage material 26 may be configured as floating gate material (such as, for example, polycrystalline silicon).

[0034] The charge-blocking material 18 may comprise any suitable composition(s); and in some embodiments may comprise one or more of silicon dioxide, aluminum oxide, hafnium oxide, zirconium oxide, etc.

[0035] The insulative material 24 may comprise any suitable composition(s); and in some embodiments may comprise silicon dioxide.

[0036] The channel material pillars 20 extend through a stack 26 of alternating insulative levels 28 and conductive levels 30.

[0037] The conductive levels 30 may comprise, for example, one or more of various metals (for example, tungsten, titanium, etc.), metal-containing compositions (for example, metal nitride, metal carbide, metal silicide, etc.), and conductively-doped semiconductor materials (for example, conductively-doped silicon, conductively-doped germanium, etc.). For instance, the conductive levels 30 may comprise n-type doped polycrystalline silicon (i.e., n-type doped polysilicon) of SONOS (semiconductor-oxide-nitride-oxide-semiconductor), or metal of MONOS (metal-oxide-nitride-oxide-semiconductor); with an example MONOS being TANOS (tantalum-alumina-nitride-oxide-semiconductor). In some embodiments, the conductive levels 30 may comprise titanium nitride around a metallic core, with the metallic core comprising tungsten or tantalum.

[0038] The conductive levels 30 may correspond to wordlines, and may comprise control gates 32 for the memory cells 12. In some embodiments, the vertically-stacked memory cells 12 are configured as NAND strings, with the number of memory cells 12 in the individual strings being determined by the number of conductive levels 30. The NAND strings may comprise any suitable number of memory cell levels. For instance, the NAND strings may have 8 memory cell levels, 16 memory cell levels, 32 memory cell levels, 64 memory cell levels, 512 memory cell levels, 1024 memory cell levels, etc.

[0039] The insulative levels 28 may comprise any suitable composition or combination of compositions; and may, for example, comprise silicon dioxide.

[0040] The levels 28 and 30 may be of any suitable thicknesses; and may be the same thickness as one another, or different thicknesses relative to one another.

[0041] The channel material pillars 20 extend through an insulative material 34 and contact a conductive structure 36.

[0042] The insulative material 34 may comprise any suitable composition(s); and in some embodiments, may comprise, consist essentially of, or consist of silicon dioxide.

[0043] A gap is provided between the stack 26 and the insulative material 34 to indicate that there may be additional materials and/or components provided within the assembly 10 which are not shown. For instance, source-side select gates may be provided within the illustrated gap between the stack 26 and insulative material 34.

[0044] The conductive structure 36 may correspond to a source line analogous to the source line 216 discussed above with reference to FIG. 4.

[0045] The conductive structure 36 includes an upper primary portion 38, and a conductive projection 40 which extends downwardly from the upper primary portion.

[0046] The upper primary portion 38 includes a first conductive constituent 42, and a second conductive constituent 44 over the first conductive constituent.

[0047] The first conductive constituent 42 comprises a conductive material 46, and the second conductive constituent 44 comprises a conductive material 48 which is compositionally different from the conductive material 46. In some embodiments, the conductive material 46 may comprise metal (e.g., one or more of titanium nitride, tantalum nitride, tungsten, etc.), while the conductive material 48 comprises conductively-doped semiconductor material. In some embodiments, the conductive material 48 of the second conductive constituent 44 may comprise, consist essentially of, or consist of conductively-doped silicon. For instance, the conductive material 48 may comprise n-type polysilicon.

[0048] The channel material 14 directly contacts the conductively-doped semiconductor material 48 of the second conductive constituent 44. In some embodiments, such may be desired so that dopant from the conductively-doped semiconductor material 48 may be diffused into the channel material 14 to provide desired dopant levels within channel regions of select gates (not shown).

[0049] In the illustrated embodiment of FIG. 5, the channel material pillars 20 extend to an upper surface of the conductive material 48 of the second conductive constituent 44. In other embodiments, the channel material pillars 28 penetrate into the conductive material 48.

[0050] The conductive structure 36 is shown to be electrically coupled with circuitry 50. Such circuitry may be any suitable circuitry suitable for operation of the source line 36.

[0051] The stack 26 and the conductive structure 36 are shown to be supported over a base 52. The base 52 may comprise semiconductor material; and may, for example, comprise, consist essentially of, or consist of monocrystalline silicon. The base 52 may be referred to as a semiconductor substrate. The term “semiconductor substrate” means any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials), and semiconductive material layers (either alone or in assemblies comprising other materials). The term “substrate” refers to any supporting structure, including, but not limited to, the semiconductor substrates described above. In some applications, the base 52 may correspond to a semiconductor substrate containing one or more materials associated with integrated circuit fabrication. Such materials may include, for example, one or more of refractory metal materials, barrier materials, diffusion materials, insulator materials, etc.

[0052] A gap is provided between the structure 36 and the base 52 to indicate that other components and materials may be provided between the structure 36 and the base 52. For instance, the circuitry 50 may be provided within the illustrated gap between the structure 36 and the base 52.

[0053] The structure 36 may have any suitable configuration. Example configurations are described with reference to FIGS. 6-8.

[0054] Referring to FIGS. 6, 6A and 6B, the conductive structure 36 is shown in top view (FIG. 6) and a pair of cross-sectional side views (FIGS. 6A and 6B). The cross-sectional view of FIG. 6A is along the line A-A of FIG. 6, and the cross-sectional view of FIG. 6B is along the line B-B of FIG. 6.

[0055] The projection 40 is shown in dashed-line (i.e., phantom) view in FIG. 6 to indicate that such projection is beneath the material 48.

[0056] FIG. 6B shows that the first conductive constituent 42 of the upper primary portion 38 is configured as a container 53. The container 53 has a bottom 54, and a pair of sidewalls 56 and 58 extending upwardly from the bottom. An interior region 60 of the container 53 is over the bottom 54 and between the sidewalls 56 and 58. The interior region 60 of the container 53 is bounded by a surface 61 which extends along an upper surface of the bottom 54, and along inner surfaces of the sidewalls 56 and 58.

[0057] The second conductive constituent 44 of the primary portion 38 is configured as a mass 55 which fills the interior region 60 of the container 53.

[0058] The mass 55 joins to the container 53 along an interface 63 that extends along the inner surface 61 of the container 53.

[0059] In the illustrated embodiment, a planarized surface 65 extends across upper surfaces of the first and second conductive constituents 42 and 44.

[0060] The conductive constituents 42 and 44 may comprise any suitable materials. Example materials are described above with reference to FIG. 5. In some embodiments, the constituents 42 and 44 may be homogeneous (as shown in FIGS. 5, 6, 6A and 6B). In other embodiments, at least one of the constituents 42 and 44 may comprise two or more discrete compositions. Example configurations in which the lower conductive constituent 42 comprises more than one discrete composition are described with reference to FIGS. 6B-1, 6B-2 and 6B-3.

[0061] Referring to FIG. 6B-1, the constituent 42 is shown to comprise three discrete compositions 70, 72 and 74. Such compositions may be metal-containing compositions; and in some embodiments, may be referred to as a first metal-containing material 70, a second metal-containing material 72, and a third metal-containing material 74. In some embodiments, two of the materials 70, 72 and 74 may comprise a same metal as one another, and the other of the materials may comprise a different metal. For instance, in some embodiments the first and third materials 70 and 74 may comprise a same metal as one another (which may be referred to as a first metal), and the second material 72 may comprise a different metal (which may be referred to as a second metal). For instance, in some embodiments the first and third materials 70 and 74 may both comprise, consist essentially of, or consist of titanium nitride, and the second material 72 may comprise, consist essentially of, or consist of tungsten. As another example, in some embodiments the first and third materials 70 and 74 may both comprise, consist essentially of, or consist of tantalum nitride, and the second material 72 may comprise, consist essentially of, or consist of tungsten.

[0062] In the embodiment of FIG. 6B-1, all three of the materials 70, 72 and 74 extend into the projection 40. In other embodiments, the projection 40 may comprise only two of the three materials 70/72/74, or only one of such three materials. FIG. 6B-2 shows an embodiment in which the projection 40 comprises only the materials 70 and 72. FIG. 6B-3 shows an embodiment in which the projection 40 comprises only the material 70.

[0063] FIGS. 6B-1, 6B-2 and 6B-3 show embodiments in which the conductive constituent 42 comprises three separate materials 70, 72 and 74. In other embodiments, the conductive constituent 42 may comprise fewer than three separate materials (i.e., only a single material, or only two separate materials), or may comprise more than three separate materials. Further, although the constituent 44 is shown to be homogeneous, in other embodiments (not shown) the constituent 44 may comprise two or more different materials.

[0064] The embodiments of FIGS. 5, 6, 6A, 6B, 6B-1, 6B-2 and 6B-3 show the projection 40 joining to the upper primary portion 38 of the conductive structure 36 at an interconnecting region 76 having arcuate corners 77 along the various cross-sections shown in the figures. The arcuate corners 77 may be advantageous as compared to more square corners in that it may be easier to uniformly form material across arcuate corners as compared to square corners, adhesion of material along arcuate corners may be enhanced as compared to that along square corners, and the conductive structure 36 may have improved strength along the arcuate corners as compared to a similar structure having square corners. However, although it may be desired to utilize arcuate corners, some embodiments may alternatively utilize square corners. For instance, FIG. 6B-4 shows a configuration of the conductive structure 36 in which the projection 40 joins to the upper primary portion 38 at an interconnecting region 76 having substantially sharp corners 77 along the illustrated cross-section. The sharp corners may have any suitable angles, and in the illustrated embodiment have angles of about 90°.

[0065] Although the configurations of FIGS. 5, 6, 6A, 6B, 6B-1, 6B-2, 6B-3 and 6B-4 show the conductive structures 36 comprising only a single projection 40, in other embodiments analogous conductive structures may comprise more than one projection 40. The conductive structures 36 may be utilized as source lines as discussed above with reference to FIG. 5, or may be utilized in other applications within integrated circuits (with the term “integrated circuit” meaning an electronic circuit supported by a semiconductor substrate). The number of projections 40 associated with a conductive structure 36 may be any suitable number of projections appropriate for the application for which the conductive structure 36 is utilized. FIGS. 7, 7A-1, 7A-2, 8, 8A and 8B show example configurations for conductive structures 36 comprising two or more projections 40.

[0066] It is noted that the embodiment of FIG. 7A-1 shows the projections 40 joining to the upper primary portion 38 of the conductive structure 36 through interconnecting regions 76 having arcuate corners 77. Such arcuate corners may provide any or all of the advantages described above. Further, arches 80 are formed between neighboring projections 40 where arcuate corners join to one another. The arches 80 may provide advantages of enhanced structural strength as compared to non-arched structures. FIG. 7A-2 shows an analogous embodiment, but in which the corners 77 are sharp. Such embodiment may be less preferred than that of FIG. 7A-1 for at least the reason that the arches 80 are lacking.

[0067] The structures described above may be formed with any suitable processing. Example processing is described with reference to FIGS. 9-14.

[0068] Referring to FIG. 9, a construction 100 comprises an insulative mass 102 extending across a conductive pedestal 104. The mass 102 and the pedestal 104 may be supported by a semiconductor base 52 of the type described above with reference to FIG. 5 (not shown in FIG. 9).

[0069] The insulative mass 102 may comprise any suitable composition(s); and in some embodiments may comprise, consist essentially of, or consist of silicon dioxide. The mass 102 may be homogeneous (as shown) or may comprise multiple discrete compositions.

[0070] The conductive pedestal 104 is an example of a conductive interconnect. Such conductive pedestal may comprise any suitable composition(s), such as, for example, one or more of various metals (e.g., titanium, tungsten, cobalt, nickel, platinum, ruthenium, etc.), metal-containing compositions (e.g., metal silicide, metal nitride, metal carbide, etc.), and/or conductively-doped semiconductor materials (e.g., conductively-doped silicon, conductively-doped germanium, etc.). The pedestal 104 may be homogeneous (as shown), or may comprise multiple discrete compositions.

[0071] Referring to FIG. 10, a trench 106 is formed to extend into the insulative mass 102.

[0072] Referring to FIG. 11, a via (i.e., hole) 108 is formed to extend downwardly from the trench 106 and into the insulative mass 102. In the shown embodiment, the via 108 extends to an upper surface of the conductive pedestal 104. Although only one via 108 is shown, in other embodiments multiple vias may be formed to extend downwardly from the trench 106.

[0073] The trench 106 and via 108 may be patterned with any suitable processing. In some embodiments, the via 108 may be patterned utilizing a first reticle to define the location of the via, followed by appropriate etching into the insulative mass 102. Subsequently, the trench 106 may be patterned with a second reticle to define the location of the trench, followed by appropriate etching into the insulative mass 102. The processing may form the rounded corners 77 (i.e., the arcuate corners 77) of FIG. 11. Alternatively, the trench 106 and the via 108 may be fabricated utilizing a dual-damascene process or other appropriate process, which may or may not form the rounded corners 77 (e.g., which may instead form square corners of the type described above with reference to FIG. 6B-4).

[0074] Referring to FIG. 12, conductive materials 46 and 48 are formed within the trench 106 and the via 108. The conductive materials 46 and 48 may be the same as those described above with reference to FIG. 5. The conductive materials 46 and 48 may be homogeneous (as shown). Alternatively, one or both of the conductive materials 46 and 48 may comprise multiple discrete compositions. For instance, in some embodiments the material 46 may comprise the three discrete compositions 70, 72 and 74 described above with reference to FIG. 6B-1.

[0075] The material 46 lines the trench 106 to form a conductive container 53 within the trench. The conductive container 53 comprises a bottom 54 and sidewalls 110 extending upwardly from the bottom (the sidewalls 110 of FIG. 12 are at ends of the container 53 and may be called end-walls; other sidewalls 56 and 58—not shown in FIG. 12, but like those of FIG. 6B—would be along sides of the container). An interior region 60 of the container is over the bottom 54 and between the sidewalls 110.

[0076] The material 48 forms a conductive mass 55 within the interior region 60. The material 48 may comprise conductively-doped semiconductor material, as described above with reference to FIG. 5.

[0077] Referring to FIG. 13, construction 100 is subjected to planarization (e.g., chemical-mechanical polishing) to form a planarized surface 111 extending across upper surfaces of the insulative mass 102, the material 46 and the material 48. The planarization may be considered to remove the material 48 from across the sidewalls 110 of the container 53 (with the material 48 being shown to extend across the sidewalls 110 at the process stage of FIG. 12). The planarization may also remove material 48 from over sidewalls of the type shown in FIG. 6B as sidewalls 56 and 58.

[0078] The materials 46 and 48 together form a conductive structure 36 of the type described above with reference to FIG. 5. Such conductive structure comprises the upper primary portion 38, and the conductive projection 40. In the illustrated embodiment, the conductive projection 40 extends to the conductive plug 104, which in turn may extend to circuitry 50 of the type described above with reference to FIG. 5.

[0079] Referring to FIG. 14, a stack 26 of the insulative levels 28 and the conductive levels 30 is formed over the conductive structure 36. Also, a channel material pillar 20 of the type described above with reference to FIG. 5 is formed to extend to the conductively-doped semiconductor material 48 of the conductive structure 36. The tunneling material 15, charge-storage material 16 and charge-blocking material 18 are formed along the channel material pillar 20. Accordingly, memory cells 12 are formed over the conductive structure 36, with the memory cells being along the channel material pillar 20. The pillar 20 may be representative of a large number of substantially identical channel material pillars, and the memory cells 12 may be representative of a large number of substantially identical memory cells of a memory array (for instance, a NAND memory array). The term “substantially identical” means identical to within reasonable tolerances of fabrication and measurement.

[0080] The assemblies and structures discussed above may be incorporated into electronic systems. Such electronic systems may be used in, for example, memory modules, device drivers, power modules, communication modems, processor modules, and application-specific modules, and may include multilayer, multichip modules. The electronic systems may be any of a broad range of systems, such as, for example, cameras, wireless devices, displays, chip sets, set top boxes, games, lighting, vehicles, clocks, televisions, cell phones, personal computers, automobiles, industrial control systems, aircraft, etc.

[0081] Unless specified otherwise, the various materials, substances, compositions, etc. described herein may be formed with any suitable methodologies, either now known or yet to be developed, including, for example, atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), etc.

[0082] The terms “dielectric” and “insulative” may be utilized to describe materials having insulative electrical properties. The terms are considered synonymous in this disclosure. The utilization of the term “dielectric” in some instances, and the term “insulative” (or “electrically insulative”) in other instances, may be to provide language variation within this disclosure to simplify antecedent basis within the claims that follow, and is not utilized to indicate any significant chemical or electrical differences.

[0083] The particular orientation of the various embodiments in the drawings is for illustrative purposes only, and the embodiments may be rotated relative to the shown orientations in some applications. The descriptions provided herein, and the claims that follow, pertain to any structures that have the described relationships between various features, regardless of whether the structures are in the particular orientation of the drawings, or are rotated relative to such orientation.

[0084] The cross-sectional views of the accompanying illustrations only show features within the planes of the cross-sections, and do not show materials behind the planes of the cross-sections, unless indicated otherwise, in order to simplify the drawings.

[0085] When a structure is referred to above as being “on” or “against” another structure, it can be directly on the other structure or intervening structures may also be present. In contrast, when a structure is referred to as being “directly on” or “directly against” another structure, there are no intervening structures present.

[0086] Structures (e.g., layers, materials, etc.) may be referred to as “extending vertically” to indicate that the structures generally extend upwardly from an underlying base (e.g., substrate). The vertically-extending structures may extend substantially orthogonally relative to an upper surface of the base, or not.

[0087] Some embodiments include a conductive structure of an integrated circuit. The conductive structure includes an upper primary portion, with the upper primary portion having a first conductive constituent configured as a container. The container has a bottom and a pair of sidewalls extending upwardly from the bottom. An interior region of the container is over the bottom and between the sidewalls. The upper primary portion includes a second conductive constituent configured as a mass filling the interior region of the container. The second conductive constituent is a different composition than the first conductive constituent. The second conductive constituent joins to the first conductive constituent along an interface that extends along interior surfaces of the sidewalls of the container and across an upper surface of the bottom of the container. One or more conductive projections join to the upper primary portion and extend downwardly from the upper primary portion.

[0088] Some embodiments include an assembly having channel material pillars which extend vertically, having memory cells along the channel material pillars, and having a conductive structure under the channel material pillars. The conductive structure includes an upper primary portion, and one or more conductive projections joined to the upper primary portion and extending downwardly from the upper primary portion. The upper primary portion includes a first conductive constituent configured as a container having a bottom and having a pair of sidewalls extending upwardly from the bottom. An interior region of the container is over the bottom and between the sidewalls. The upper primary portion also includes a second conductive constituent configured as a mass filling the interior region of the container. The second conductive constituent comprises a different composition than the first conductive constituent. The second conductive constituent joins to the first conductive constituent along an interface that extends along interior surfaces of the sidewalls of the container and across an upper surface of the bottom of the container. The second conductive constituent comprises conductively-doped semiconductor material and is directly against the channel material pillars.

[0089] Some embodiments include a method of forming a conductive structure. A trench is formed to extend into an insulative mass. One or more vias are formed to extend downwardly from the trench and into the insulative mass. One or more metal-containing conductive materials are formed within the one or more vias and within the trench. Said one or more metal-containing conductive materials fill the one or more vias to form a conductive projection within each of said one or more vias. Said one or more metal-containing conductive materials line the trench to form a conductive container within the trench. The conductive container has a bottom, and has a pair of sidewalls extending upwardly from the bottom. An interior region of the container is over the bottom and between the sidewalls. A conductive mass is formed within the interior region of the container. The conductive mass comprises conductively-doped semiconductor material.

[0090] In compliance with the statute, the subject matter disclosed herein has been described in language more or less specific as to structural and methodical features. It is to be understood, however, that the claims are not limited to the specific features shown and described, since the means herein disclosed comprise example embodiments. The claims are thus to be afforded full scope as literally worded, and to be appropriately interpreted in accordance with the doctrine of equivalents.