Manufacturing method for reverse conducting insulated gate bipolar transistor

Abstract

A manufacturing method for reverse conducting insulated gate bipolar transistor, the manufacturing method is characterized by the use of polysilicon for filling in grooves on the back of a reverse conducting insulated gate bipolar transistor. The parameters of reverse conducting diodes on the back of the reverse conducting insulated gate bipolar transistor can be controlled simply by controlling the doping concentration of the polysilicon accurately, indicating relatively low requirements for process control. The reverse conducting insulated gate bipolar transistor manufacturing method is relatively low in requirements for process control and relatively small in manufacturing difficulty.

Claims

1. A method of manufacturing a reverse conducting insulated gate bipolar transistor, comprising the following steps: preparing an N-type substrate; growing a gate oxide layer at a front side of the N-type substrate; depositing a polysilicon gate on the gate oxide layer; forming a P well on the N-type substrate by photoetching, etching and ion-implanting processes; forming an N+ region and a front side P+ region in the P well by photoetching and ion-implanting processes; depositing a dielectric layer at the front side of the N-type substrate; depositing a protecting layer on the dielectric layer; grinding the N-type substrate by a back side grinding process; forming a back side P+ region by implanting a P-type impurity to a back side of the N-type substrate; forming a trench at the back side of the N-type substrate by photoetching and etching processes; filling the trench by depositing polysilicon at the back side of the N-type substrate, and etching the polysilicon positioned at an area outside of the trench; removing the protecting layer at the front side of the N-type substrate; selectively etching the dielectric layer to form a contact hole for shorting the N+ region and the front side P+ region, and forming a front side metal layer; depositing a passivation layer at the front side of the N-type substrate; and performing a back side metallization process at the back side of the N-type substrate, and forming a back side metal layer.

2. The method of manufacturing the reverse conducting insulated gate bipolar transistor of claim 1, characterized in that, after forming the back side metal layer by performing the back side metalized process at the back side of the N-type substrate, the method further comprises controlling a carrier lifetime at a partial area in the N-type substrate by a local radiation technique.

3. The method of manufacturing the reverse conducting insulated gate bipolar transistor of claim 2, characterized in that, the local radiation technique radiates the N-type substrate by using electron or proton.

4. The method of manufacturing the reverse conducting insulated gate bipolar transistor of claim 1, characterized in that, the trench formed at the back side of the N-type substrate is of a rectangle shape.

5. The method of manufacturing the reverse conducting insulated gate bipolar transistor of claim 4, characterized in that, a depth of the trench formed at the back side of the N-type substrate is from 1 to 20 m, a width thereof is from 1 to 30 m, and a distance between two adjacent trenches is from 50 to 300 m.

6. The method of manufacturing the reverse conducting insulated gate bipolar transistor of claim 1, characterized in that, the polysilicon deposited in the trench formed at the back side of the N-type substrate is N-type polysilicon.

7. The method of manufacturing the reverse conducting insulated gate bipolar transistor of claim 6, characterized in that, a doping concentration of the polysilicon deposited in the trench formed at the back side of the N-type substrate is 1E17 to 1E21 cm.sup.3.

8. The method of manufacturing the reverse conducting insulated gate bipolar transistor of claim 1, characterized in that, from the N-type substrate to an external, the back side metal layer comprises aluminum, titanium, nickel and silver, which are laminated in that order.

9. The method of manufacturing the reverse conducting insulated gate bipolar transistor of claim 1, characterized in that, the dielectric layer is made of silicon dioxide and boro-phospho-silicate glass.

10. The method of manufacturing the reverse conducting insulated gate bipolar transistor of claim 1, characterized in that, the protecting layer is made of silicon nitride.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 shows a flow chart of a method of manufacturing the reverse conducting insulated gate bipolar transistor in an embodiment;

(2) FIGS. 2 to 17 are schematic diagrams of corresponding reverse conducting insulated gate bipolar transistor in the manufacturing method of the field stop insulated gate bipolar transistor shown in FIG. 1.

DETAILED DESCRIPTION OF THE EMBODIMENTS

(3) Referring to FIG. 1, in an embodiment, the method of manufacturing the reverse conducting insulated gate bipolar transistor is provided, which includes the following steps.

(4) In step S111, an N-type substrate 110 is prepared. As shown in FIG. 2, the N-type substrate 110 is an N-type silicon substrate.

(5) In step S112, a gate oxide layer 121 is grown at a front side of the N-type substrate 110. As shown in FIG. 3, the thickness of the gate oxide layer 121 is from 600 angstroms to 1500 angstroms.

(6) In step S113, a polysilicon gate 122 is deposited on the gate oxide layer 121, as shown in FIG. 3.

(7) In step S114, a P well 123 is formed on the N-type substrate 110 by photoetching, etching and ion-implanting processes (referring to FIG. 5). Referring to FIG. 4, an implantation window of the P well 123 is formed by selectively etching the polysilicon gate 122 and the gate oxide layer 121 by the photoetching process. Referring to FIG. 5, a P-type impurity is implanted to the implantation window of the P well 123 by the self-aligned implantation process, and the P well 123 is formed by a drive-in process.

(8) In step S115, an N+ region 124 and a front side P+ region 125 are formed in the P well 123 by photoetching and ion-implanting processes (referring to FIG. 7). Referring to FIG. 6, ions are selectively implanted to the P well 123 by the photoetching process, and the N+ region 124 is formed by the drive-in process. Referring to FIG. 7, ions are selectively implanted to the P well 123 by the photoetching process, and the front side P+ region 125 is formed by the drive-in process. The N+ region 124 is mainly configured as an emitter of the reverse conducting insulated gate bipolar transistor.

(9) In step S116, a dielectric layer 126 is deposited at the front side of the N-type substrate 110. As shown in FIG. 8, the dielectric layer 126 is made of silicon dioxide and boro-phospho-silicate glass.

(10) In step S117, a protecting layer 127 is deposited on the dielectric layer 126. As shown in FIG. 9, the protecting layer is made of silicon nitride.

(11) In step S118, the N-type substrate 110 is ground by a back side grinding process. In step 118, the N-type substrate 110 is ground to the required thickness.

(12) In step S121, a back side P+ region 131 is formed by implanting a P-type impurity to a back side of the N-type substrate 110, as shown in FIG. 10.

(13) In step S122, a trench 132 is formed at the back side of the N-type substrate 110 by photoetching and etching processes. As shown in FIG. 11, in the embodiment, the trench 132 formed at the back side of the N-type substrate 110 is of a rectangle shape. Of course, the trench 132 formed at the back side of the N-type substrate 110 is of a circle, an oval, a trapezium and other appropriate shapes. When the trench 132 formed at the back side of the N-type substrate 110 is of a rectangle shape, a depth of the trench 132 is from 1 to 20 m, a width thereof is from 1 to 30 m, and a distance between two adjacent trenches 132 is from 50 to 300 m.

(14) In step S123, the trench 132 is filled by depositing polysilicon at the back side of the N-type substrate 110, and the polysilicon at an area outside of the trench 132 is etched. As shown in FIG. 12, in step S123, the reverse conducting diode is formed by filling polysilicon in the trench 132. The parameters of the reverse conducting diode at the back side of the manufactured reverse conducting insulated gate bipolar transistor can be adjusted by adjusting the doping concentration of polysilicon in the trench 132, so that the difficulty of the adjusting process is low and it is easy to control the process. Therefore, the manufacturing difficulty of the reverse conducting insulated gate bipolar transistor can be reduced. Of course, the parameters of the reverse conducting diode at the back side of the reverse conducting insulated gate bipolar transistor can be also adjusted by adjusting a width and a depth of the trench 132, or by adjusting the doping concentration of polysilicon in the trench 132 and the width and the depth of the trench 132 at the same time. Therefore, the difficulty of the adjusting process of the reverse conducting insulated gate bipolar transistor can be reduced, and then the manufacturing difficulty thereof is reduced. In the embodiment, the polysilicon deposited in the trench 132 formed at the back side of the N-type substrate 110 is N-type polysilicon. The doping concentration of the polysilicon deposited in the trench 132 is 1E17 to 1E21 cm.sup.3.

(15) In step S124, the protecting layer 127 at the front side of the N-type substrate is removed, as shown in FIG. 13.

(16) In step S125, a contact hole for shorting the N+ region 124 and the front side P+ region 125 is formed by selectively etching the dielectric layer 126, and a front side metal layer 128 is formed. As shown in FIG. 14, from the manufacturing flow of the reverse conducting insulated gate bipolar transistor described above, it can be understood that step S122 and step S123 are performed after performing step S116. In other words, forming the trench 132 at the back side of the N-type substrate 110 and depositing the polysilicon in the trench 132 are performed after performing depositing the dielectric layer 126 at the front side of the N-type substrate 110 rather than after performing the whole front side process of the reverse conducting insulated gate bipolar transistor. Such a manufacturing method has the following advantages. Firstly, after the P-type impurity is implanted at the back side of the N-type substrate 110 in step S121, the following front side thermal processes such as the hole reflow process (the hole reflow process is in forming the contact hole for shorting the N+ region 124 and the front side P+ region 125 by selectively etching the dielectric layer 126 and forming a front side metal layer 128 of step S125, and the temperature of the step S125 is about 850 degrees centigrade) and so on are performed. The activity of the P-type impurity at the back side of the N-type substrate 110 is very high without performing the annealing process individually. Therefore, the step of the thermal annealing of the P-type impurity at the back side of the N-type substrate 110 can be omitted. Further, the polysilicon in the trench 123 at the back side of the N-type substrate 110 and the polysilicon of the front side are processed separately, thus easily controlling the doping concentration of the polysilicon.

(17) In step S126, a passivation layer 129 is deposited at the front side of the N-type substrate 110. As shown in FIG. 15, here, a pad area is formed by performing the etching process.

(18) In step S127, a back side metal layer 133 is formed by performing a back side metalized process at the back side of the N-type substrate 110. In the embodiment, from the N-type substrate to an external, the back side metal layer 133 at the back side of the N-type substrate 110 comprises aluminum, titanium, nickel and silver, which are laminated in that order. In other words, the outermost layer is metal silver.

(19) In step S128, a carrier lifetime at a partial area 111 in the N-type substrate 110 is controlled by a local radiation technique. As shown in FIG. 17, in the embodiment, the local radiation technique radiates the N-type substrate 110 by using electron or proton to control the life of the carrier at a partial area 111 in the N-type substrate 110. Therefore, manufacturing of the reverse conducting insulated gate bipolar transistor is completed.

(20) The method of manufacturing the reverse conducting insulated gate bipolar transistor described above uses polysilicon for filling the trench at the back side of the reverse conducting insulated gate bipolar transistor. Thus, the parameters of the reverse conducting diode at the back side of the reverse conducting insulated gate bipolar transistor can be controlled by only precisely controlling the doping concentration of polysilicon, resulting in a lower requirement of controlling the process. Therefore, the method of manufacturing the reverse conducting insulated gate bipolar transistor has a lower requirement of controlling the manufacturing process, and a less difficulty of manufacturing.

(21) Although the invention is illustrated and described herein with reference to specific embodiments, the invention is not intended to be limited to the details shown. Rather, various modifications may be made in the details within the scope and range of equivalents of the claims and without departing from the invention.