Temperature Control Element Utilized in Device Die Packages
20230163048 · 2023-05-25
Inventors
- Yingying Wang (Sunnyvale, CA, US)
- Emad Samadiani (Cypress, CA, US)
- Madhusudan K. Iyengar (Foster City, CA, US)
- Padam Jain (San Jose, CA, US)
- Xiaojin Wei (Dublin, CA, US)
- Teckgyu Kang (Saratoga, CA, US)
- Sudharshan Sugavanesh Udhayakumar (Santa Clara, CA, US)
- Yingshi Tang (Danville, CA, US)
Cpc classification
H01L2224/16227
ELECTRICITY
H01L2224/29035
ELECTRICITY
H01L24/73
ELECTRICITY
H01L23/3735
ELECTRICITY
International classification
Abstract
An IC die includes a temperature control element suitable for three-dimensional IC package with enhanced thermal control and management. The temperature control element may assist temperature control of the IC die when in operation. In one example, the temperature control element may have a plurality of thermal dissipating features disposed on a first surface of the IC die to efficiently control and dissipate the thermal energy from the IC die when in operation. A second surface opposite to the first surface of the IC die may include a plurality of devices, such as semiconductors transistors, devices, electrical components, circuits, or the like, that may generate thermal energy when in operation. The temperature control element may provide an IC die with high efficiency of heat dissipation that is suitable for 3D IC package structures and requirements.
Claims
1. An integrated circuit (IC) package, comprising: an IC die disposed on a printed circuit board (PCB), and a temperature control element encasing the IC die, wherein the temperature control element comprises: a plurality of thermal dissipating features disposed on a first surface of the IC die; and a manifold disposed on the PCB encasing the plurality of thermal dissipating features disposed on the IC die.
2. The IC package of claim 1, wherein each of the thermal dissipating features comprises a metallic pin fin disposed on a solder bump.
3. The IC package of claim 2, wherein the metallic pin fin is manufactured from a material selected from copper, aluminum, tungsten, gold, silver, combinations thereof or alloys thereof.
4. The IC package of claim 1, wherein the plurality of thermal dissipating features is arranged in one or more arrays or matrices.
5. The IC package of claim 1, further comprising: a sealing member disposed between the manifold and the IC die.
6. The IC package of claim 1, wherein the manifold comprises: a first sidewall; a second sidewall; and a ceiling disposed between the first and the second sidewall, defining a central cavity that allows the IC die to be encased therein.
7. The IC package of claim 6, further comprising: a plenum defined in a center portion of the ceiling.
8. The IC package of claim 7, wherein the plenum allows fluid to flow therethrough from an inlet to an outlet of the plenum.
9. The IC package of claim 1, further comprising: a spacer disposed between the thermal dissipating feature and the manifold.
10. The IC package of claim 1, wherein the plurality of thermal dissipating features has a circular configuration, a rectangular configuration, or a longitudinal structure.
11. The IC package of claim 1, wherein the thermal dissipating features have different aspect ratios.
12. The IC package of claim 1, further comprises: a metallization layer disposed between the plurality of thermal dissipating features and the IC die.
13. The IC package of claim 1, wherein the thermal dissipating features are divided into a first and a second zone disposed on the IC die, wherein the first zone has a higher number of the thermal dissipating features than the second zone.
14. The IC package of claim 1, wherein the plurality of the thermal dissipating features has a top surface spaced apart from the manifold.
15. The IC package of claim 1, wherein the plurality of the thermal dissipating features has a top surface in direct contact with the manifold.
16. The IC package of claim 1, wherein the IC die has a second surface opposite to the first surface, wherein device structures are formed on the second surface of the IC die.
17. A temperature control element, comprising: a plurality of thermal dissipating features configured to be disposed on a surface of the IC die; and a manifold having a plenum configured to encase the plurality of thermal dissipating features disposed on the IC die.
18. The temperature control element of claim 17, wherein each of the thermal dissipating features further comprises: a metallic pin fin disposed on a solder bump.
19. The temperature control element of claim 17, wherein the plenum is configured to receive fluid to control temperature of the IC die when in operation.
20. A method for manufacturing a temperature control element in an IC package, comprising: disposing a plurality of thermal dissipating features on an IC die disposed on a PCB; placing a manifold on the PCB to encase the IC die therein while maintaining the plurality of thermal dissipating features located in a plenum defined in the manifold; and supplying a fluid into the plenum to regulate a thermal energy transmitted from the IC die.
Description
DESCRIPTION OF THE DRAWINGS
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DETAILED DESCRIPTION
[0025] The technology relates generally to a temperature control element that may be utilized to control a temperature of an IC die integrated in an IC packaging assembly. The temperature control element may be formed on an IC die to assist temperature control of the IC die when in operation. In one example, the temperature control element may have a plurality of thermal dissipating features disposed on a first surface of an IC die encased under a manifold to efficiently control and dissipate the thermal energy from the IC die when in operation. A second surface opposite to the first surface of the IC die may include a plurality of devices, such as semiconductors transistors, devices, electrical components, circuits, or the like, that may generate thermal energy when in operation. The thermal dissipating features may be manufactured from a heat dissipation material to assist dissipating thermal energy generated by the plurality of devices in the IC die during operation. Different configurations of the thermal dissipating features may be utilized to accommodate different device layouts with different thermal energy generation across the substrate in the IC die.
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[0027] In one example, a temperature control element 151 is utilized to encase the IC die 105. The temperature control element 151 overlies an adhesive material 152. The adhesive material 152 provides a good sealing interface between the temperature control element 151 and the PCB 106. The temperature control element 151 includes a manifold 150 having a first side wall 161 and a second sidewall 163 connected by a ceiling 162, forming a substantially U-shape body 164 that defines a central cavity 160 on a bottom side of the manifold 150. The central cavity 160 may encase one or more IC dies 105 positioned therein when the temperature control element 151 is placed or mounted on the PCB 106. A sealing member 165 may be utilized to seal the interface where the manifold 150 is in contact with the IC die 105. In one example, the sealing member 165 may be an adhesive material, a O ring, or suitable mechanical attachments that facilitate positioning and securement of the manifold 150 to the IC die 105. A plenum 121 may be defined in the ceiling 162 of the manifold 150. The plenum 121 may allow fluid, air, or liquid to be flown therein for temperature control purposes to the IC die 105 when the temperature control element 151 is in place for operation.
[0028] A plurality of thermal dissipating features 120 may be disposed on a first surface 109 of the IC die 105 that may assist dissipating thermal energy from the IC die 105 when IC die 105 is in operation. In one example, the plurality of thermal dissipating features 120 may be disposed on the first surface 109 of the IC die 105 by plating, depositing or soldering. A second surface 111 is formed substantially in paragraph and opposite to the first surface 109 where a plurality of device structures 115 may be disposed to form the IC die 105. A metallization layer 110 may be formed on the surface 109 of the IC die 105 to facilitate soldering the plurality of thermal dissipating features 120 thereon. In one example, the metallization layer 110 may be manufactured from a conductive material, such as copper, aluminum, tungsten, nickel, silver, iron, combinations thereof, alloys thereof or the like.
[0029] In one example, each of the thermal dissipating features 120 may include a metallic pin fin 125 disposed on a solder bump 124. The solder bump 124 may assist soldering the metallic pin fins 125 onto the first surface 109 of the IC die 105. In one example, the metallic pin fin 125 may be manufactured from a material that has good thermal dissipation or thermal transmission efficiency. Suitable examples of the materials that may be selected to manufacture the metallic pin fin 125 include copper, aluminum, tungsten, gold, silver, combinations thereof, alloys thereof, or the like. In one example, the thermal dissipating features 120 may be disposed on the surface 109 of the IC die 105 in the form of one or more arrays or matrices. When in operation, fluid may be supplied from an inlet 127 to circulate through the plenum 121 to an outlet 128. In one example, the number and configuration of inlet 127 and outlet128 can vary, such as an inlet disposed between two outlets. The fluid as supplied may include liquid, air, or other suitable cooling mediums that may efficiently lower and/or cool the temperature of the IC die 102 with which the fluid is in direct contact. The thermal dissipating features 120, such as the metallic pin fins 125 included therein, may increase contact surface area when the fluid is in circulation in the plenum 121 so as to enhance the cooling performance
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[0031] In
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[0037] In another example depicted in
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[0042] Referring to
[0043] In block 904, a metallization layer, such as the metallization layer 110, may be formed on the IC die. The metallization layer may be formed on a surface opposition to the surface where the device structures, transistors, or other electronic components are formed in the device region of the IC die.
[0044] In block 906, a plurality of thermal dissipating features may be disposed on the IC die.
[0045] In block 908, a manifold is placed on the PCB to encase the IC die therein while maintaining the plurality of thermal dissipating features located in a plenum defined in the manifold.
[0046] In block 910, a fluid may be supplied into the plenum of the manifold to efficiently control the temperature of the IC die through the plurality of thermal dissipating features.
[0047] In block 912, a temperature control element including the manifold and the plurality of thermal dissipating features is then implemented on the PCB encasing the IC die to form an IC package assembly with efficiency temperature dissipation control.
[0048] The features described herein allow a temperature control element being formed as an integral part of an IC package assembly that may have high heat dissipation efficiency to an IC die during operation assembled in the package assembly. The temperature control element may assist temperature control of the IC die when in operation. In one example, the temperature control element may have a plurality of thermal dissipating features disposed on a first surface of the IC die encased under a manifold to efficiently control and dissipate the thermal energy from the IC die when in operation. A second surface opposite to the first surface of the IC die may include a plurality of devices, such as semiconductors transistors, devices, electrical components, circuits, or the like, that may generate thermal energy when in operation. The thermal dissipating features may be manufactured from a heat dissipation material to assist dissipating thermal energy generated by the plurality of devices in the IC die during operation when a fluid is supplied in the temperature control element. Different configurations of the thermal dissipating features may be utilized to accommodate different device layouts with different thermal energy generation across the substrate in the IC die. Thus, the temperature control element may provide an IC die with high efficiency of heat dissipation that is suitable for 3D IC package structures and requirements.
[0049] Although the technology herein has been described with reference to particular examples, it is to be understood that these examples are merely illustrative of the principles and applications of the present technology. It is therefore to be understood that numerous modifications may be made and that other arrangements may be devised without departing from the spirit and scope of the present technology as defined by the appended claims.