Capacitors, apparatus including a capacitor, and methods for forming a capacitor are provided. One such capacitor may include a first conductor a second conductor above the first conductor, and a dielectric between the first conductor and the second conductor. The dielectric does not cover a portion of the first conductor; and the second conductor does not cover the portion of the first conductor not covered by the dielectric.

Capacitors, apparatus including a capacitor, and methods for forming a capacitor are provided. One such capacitor may include a first conductor a second conductor above the first conductor, and a dielectric between the first conductor and the second conductor. The dielectric does not cover a portion of the first conductor; and the second conductor does not cover the portion of the first conductor not covered by the dielectric.

A multilayer ceramic capacitor and a manufacturing method thereof are disclosed. The multilayer ceramic capacitor includes a base part including ceramic dielectrics, and inner electrodes formed in the ceramic dielectrics and arranged in interval by a staggered manner; two first outer electrodes of outer electrode layers are sintered and formed on two sides of the base part, and in electrical contact with the inner electrode terminals of the inner electrodes. Second outer electrodes are formed on outer parts of the two first outer electrodes. The inner electrodes and the first outer electrodes have barium titanate powder and nickel powder with average particle diameters in range of 0.2 m to 0.4 m, so that the inner electrodes are in good electrical contact with the first outer electrodes, to improve binding strength and reduce peeling of the first outer electrodes from the inner electrodes.

Capacitor structures with pitch-matched capacitor unit cells are described. In an embodiment, the capacitor unit cells are formed by interdigitated finger electrodes. The finger electrodes may be pitch-matched in multiple metal layers within a capacitor unit cell, and the finger electrodes may be pitch-matched among an array of capacitor unit cells. Additionally, border unit cells may be pitch-matched with the capacitor unit cells.

Capacitor structures with pitch-matched capacitor unit cells are described. In an embodiment, the capacitor unit cells are formed by interdigitated finger electrodes. The finger electrodes may be pitch-matched in multiple metal layers within a capacitor unit cell, and the finger electrodes may be pitch-matched among an array of capacitor unit cells. Additionally, border unit cells may be pitch-matched with the capacitor unit cells.

An EMI/energy dissipating filter for an active implantable medical device (AIMD) is described. The filter comprises a first gold braze hermetically sealing the insulator to a ferrule that is configured to be mounted in an opening in a housing for the AIMD. A lead wire is hermetically sealed in a passageway through the insulator by a second gold braze. A circuit board substrate is disposed adjacent the insulator. A two-terminal chip capacitor disposed adjacent to the circuit board has an active end metallization that is electrically connected to the active electrode plates and a ground end metallization that is electrically connected to the at least one ground electrode plates of the chip capacitor. There is a ground path electrically extending between the ground end metallization of the chip capacitor and the ferrule. The ground path comprises at least a first electrical connection material connected directly to the first gold braze, and at least an internal ground plate disposed within the circuit board substrate with the internal ground plate being electrically connected to both the first electrical connection material and the ground end metallization of the chip capacitor. An active path electrically extends between the active end metallization of the chip capacitor and the lead wire.

An EMI/energy dissipating filter for an active implantable medical device (AIMD) is described. The filter comprises a first gold braze hermetically sealing the insulator to a ferrule that is configured to be mounted in an opening in a housing for the AIMD. A lead wire is hermetically sealed in a passageway through the insulator by a second gold braze. A circuit board substrate is disposed adjacent the insulator. A two-terminal chip capacitor disposed adjacent to the circuit board has an active end metallization that is electrically connected to the active electrode plates and a ground end metallization that is electrically connected to the at least one ground electrode plates of the chip capacitor. There is a ground path electrically extending between the ground end metallization of the chip capacitor and the ferrule. The ground path comprises at least a first electrical connection material connected directly to the first gold braze, and at least an internal ground plate disposed within the circuit board substrate with the internal ground plate being electrically connected to both the first electrical connection material and the ground end metallization of the chip capacitor. An active path electrically extends between the active end metallization of the chip capacitor and the lead wire.

Some embodiments include an integrated assembly having first electrodes with top surfaces, and with sidewall surfaces extending downwardly from the top surfaces. The first electrodes are solid pillars. Insulative material is along the sidewall surfaces of the first electrodes. Second electrodes extend along the sidewall surfaces of the first electrodes and are spaced from the sidewall surfaces by the insulative material. Conductive-plate-material extends across the first and second electrodes, and couples the second electrodes to one another. Leaker-devices electrically couple the first electrodes to the conductive-plate-material and are configured to discharge at least a portion of excess charge from the first electrodes to the conductive-plate-material. Some embodiments include methods of forming integrated assemblies.

Some embodiments include an integrated assembly having first electrodes with top surfaces, and with sidewall surfaces extending downwardly from the top surfaces. The first electrodes are solid pillars. Insulative material is along the sidewall surfaces of the first electrodes. Second electrodes extend along the sidewall surfaces of the first electrodes and are spaced from the sidewall surfaces by the insulative material. Conductive-plate-material extends across the first and second electrodes, and couples the second electrodes to one another. Leaker-devices electrically couple the first electrodes to the conductive-plate-material and are configured to discharge at least a portion of excess charge from the first electrodes to the conductive-plate-material. Some embodiments include methods of forming integrated assemblies.

Capacitor structures with pitch-matched capacitor unit cells are described. In an embodiment, the capacitor unit cells are formed by interdigitated finger electrodes. The finger electrodes may be pitch-matched in multiple metal layers within a capacitor unit cell, and the finger electrodes may be pitch-matched among an array of capacitor unit cells. Additionally, border unit cells may be pitch-matched with the capacitor unit cells.