A dielectric nanolayer capacitor comprises a nanoscale dielectric layer between a cathode layer and an anode layer. When exposed to a high electric field of at least about 0.5 GV/m at a temperature of about 200 K or less, the nanoscale dielectric layer includes an amount of trapped charge sufficient to form a Coulomb barrier for suppressing leakage current. A method of charging a dielectric nanolayer capacitor includes cooling a nanolayer capacitor comprising a nanoscale dielectric layer between a cathode layer and an anode layer to a temperature of about 200 K or less, and applying a high electric field of at least about 0.5 GV/m to the nanolayer capacitor to inject electrons into the nanoscale dielectric layer. While the nanolayer capacitor remains cooled to the temperature, the electrons are trapped in the nanoscale dielectric layer and form a Coulomb barrier to suppress leakage current.

A dielectric nanolayer capacitor comprises a nanoscale dielectric layer between a cathode layer and an anode layer. When exposed to a high electric field of at least about 0.5 GV/m at a temperature of about 200 K or less, the nanoscale dielectric layer includes an amount of trapped charge sufficient to form a Coulomb barrier for suppressing leakage current. A method of charging a dielectric nanolayer capacitor includes cooling a nanolayer capacitor comprising a nanoscale dielectric layer between a cathode layer and an anode layer to a temperature of about 200 K or less, and applying a high electric field of at least about 0.5 GV/m to the nanolayer capacitor to inject electrons into the nanoscale dielectric layer. While the nanolayer capacitor remains cooled to the temperature, the electrons are trapped in the nanoscale dielectric layer and form a Coulomb barrier to suppress leakage current.

Disclosed is a broadband capacitor including floating electrodes arranged above and below a laminate in which electrode units are laminated to allow easy change of the characteristic (that is, a capacitance value) of a capacitor. The disclosed broadband capacitor comprises: a dielectric; a first external electrode; a second external electrode; a laminate, which is disposed in the dielectric and in which a plurality of electrode units are laminated; an upper floating electrode disposed in the dielectric, disposed above the laminate, and overlapping the first external electrode and the second external electrode; and a lower floating electrode disposed in the dielectric, disposed below the laminate, and overlapping the first external electrode and the second external electrode.

Disclosed is a broadband capacitor including floating electrodes arranged above and below a laminate in which electrode units are laminated to allow easy change of the characteristic (that is, a capacitance value) of a capacitor. The disclosed broadband capacitor comprises: a dielectric; a first external electrode; a second external electrode; a laminate, which is disposed in the dielectric and in which a plurality of electrode units are laminated; an upper floating electrode disposed in the dielectric, disposed above the laminate, and overlapping the first external electrode and the second external electrode; and a lower floating electrode disposed in the dielectric, disposed below the laminate, and overlapping the first external electrode and the second external electrode.

A resin composition which has excellent decomposability at low temperature, can provide a molded article having high strength, and enables an increase in the number of layers and thinning so as to enable production of an all-solid-state battery and a ceramic laminate having excellent properties. An inorganic fine particle-dispersed slurry composition containing the resin composition, an inorganic fine particle-dispersed sheet, a method for producing an all-solid-state battery, and a method for producing a multilayer ceramic capacitor. A resin composition containing a (meth)acrylic resin, the (meth)acrylic resin containing 20 to 70% by weight in total of a segment derived from methyl methacrylate and a segment derived from isobutyl methacrylate, 1 to 10% by weight of a segment derived from a glycidyl group-containing (meth)acrylate, and 5 to 40% by weight of a segment derived from a (meth)acrylate containing an ester substituent having a carbon number of 8 or more.

A resin composition which has excellent decomposability at low temperature, can provide a molded article having high strength, and enables an increase in the number of layers and thinning so as to enable production of an all-solid-state battery and a ceramic laminate having excellent properties. An inorganic fine particle-dispersed slurry composition containing the resin composition, an inorganic fine particle-dispersed sheet, a method for producing an all-solid-state battery, and a method for producing a multilayer ceramic capacitor. A resin composition containing a (meth)acrylic resin, the (meth)acrylic resin containing 20 to 70% by weight in total of a segment derived from methyl methacrylate and a segment derived from isobutyl methacrylate, 1 to 10% by weight of a segment derived from a glycidyl group-containing (meth)acrylate, and 5 to 40% by weight of a segment derived from a (meth)acrylate containing an ester substituent having a carbon number of 8 or more.

An EMI/energy dissipating filter for an active implantable medical device (AIMD) comprises a first gold braze sealing an insulator to the ferrule of a glass-to-metal seal (GTMS) and a lead wire that is sealed in a passageway through the insulator by a second gold braze. A circuit board is disposed adjacent to the insulator. A two-terminal chip capacitor disposed adjacent to the circuit board has an active end metallization connected to its active electrode plates and a ground end metallization connected to its ground electrode plates. A ground electrical path extends from the ground end metallization of the chip capacitor, through a circuit board ground plate disposed on or within the circuit board, and to the ferrule. An active electrical path extends from the active end metallization of the chip capacitor to the lead wire of the GTMS.

A MIM energy storage device comprising a bottom electrode; a plurality of electrically conductive vertical nanostructures; a bottom conduction-controlling layer conformally coating each nanostructure in the plurality of electrically conductive vertical nanostructures; and a layered stack of alternating conduction-controlling layers and electrode layers conformally coating the bottom conduction-controlling layer, the layered stack including at least a first odd-numbered electrode layer at a bottom of the layered stack, a first odd-numbered conduction-controlling layer directly on the first odd-numbered electrode layer, and a first even-numbered electrode layer directly on the first odd-numbered conduction-controlling layer. Each even-numbered electrode layer in the layered stack is electrically conductively connected to the bottom electrode; and each odd-numbered electrode layer in the layered stack is electrically conductively connected to any other odd-numbered electrode layer in the layered stack.

The present invention relates to the fields of physics, material sciences and micro and nano electronics, and concerns a method for producing a rolled-up electrical or electronic component, as can be used for example as a capacitor, or in aerials. The object of the present invention is to provide a low-cost, environmentally friendly and time-saving method for producing a rolled-up electrical or electronic component with many windings. The object is achieved by a method for producing a rolled-up component in which at least two functional and insulating layers, alternately arranged fully or partially over one another, are applied to a substrate with a sacrificial layer, wherein at least the functional or insulating layer that is arranged directly on the sacrificial layer has a perforation, at least on the two sides that are arranged substantially parallel to the rolling direction.

A silicon capacitor may include a silicon substrate having a three-dimensional pattern, and a dielectric thin film disposed over the silicon substrate and having a structure with a crystal gradient form. A manufacturing method of a dielectric thin film capacitor may include etching a silicon substrate to form a three-dimensional pattern, depositing an amorphous thin film on the etched silicon substrate at a temperature below 300° C., and embedding crystalline grains in the deposited amorphous thin film by performing plasma treatment. A manufacturing method of a dielectric thin film capacitor may include etching a silicon substrate to form a three-dimensional pattern, depositing an amorphous thin film on the etched silicon substrate at a temperature below 300° C., and depositing a crystalline layer on the deposited amorphous thin film by performing plasma treatment.