An electronic component including a substrate, a capacitor lower electrode disposed on the substrate, an inorganic dielectric layer disposed on the substrate to cover the lower electrode, a capacitor upper electrode disposed directly on the inorganic dielectric layer and facing the lower electrode via the inorganic dielectric layer, and a coil electrically connected to the lower electrode or the upper electrode. The upper surface of the inorganic dielectric layer is flat.

An electronic component including a substrate, a capacitor lower electrode disposed on the substrate, an inorganic dielectric layer disposed on the substrate to cover the lower electrode, a capacitor upper electrode disposed directly on the inorganic dielectric layer and facing the lower electrode via the inorganic dielectric layer, and a coil electrically connected to the lower electrode or the upper electrode. The upper surface of the inorganic dielectric layer is flat.

An electronic component including a substrate, a capacitor lower electrode disposed on the substrate, an inorganic dielectric layer disposed on the substrate to cover the lower electrode, a capacitor upper electrode disposed directly on the inorganic dielectric layer and facing the lower electrode via the inorganic dielectric layer, and a coil disposed on the inorganic dielectric layer and electrically connected to the lower electrode or the upper electrode.

An electronic component including a substrate, a capacitor lower electrode disposed on the substrate, an inorganic dielectric layer disposed on the substrate to cover the lower electrode, a capacitor upper electrode disposed directly on the inorganic dielectric layer and facing the lower electrode via the inorganic dielectric layer, and a coil disposed on the inorganic dielectric layer and electrically connected to the lower electrode or the upper electrode.

A multilayer ceramic capacitor includes a ceramic body including a stack of dielectric layers and internal electrodes and including main surfaces facing each other in a stacking direction, lateral surfaces facing each other in a width direction, and end surfaces facing each other in a length direction, and an external electrode electrically connected with the internal electrodes on the end surfaces. The external electrode includes an end surface covering portion covering each of the end surfaces, and a main surface covering portion covering portions of the main surfaces. The end surface and main surface covering portions each include a base electrode layer covering the ceramic body, and a plating layer covering the base electrode layer. The end surface covering portion further includes, between the base electrode layer and the plating layer, a sintered metal layer including a component different from that of the base electrode layer.

A capacitor is provided having a plurality of first conductive columnar portions that each have a nanosized outer diameter. Moreover, each of a plurality of second conductive columnar portions also have a nanosized outer diameter. A conductive portion is disposed on a first dielectric layer and faces at least a part of each of the plurality of first conductive columnar portions with the first dielectric layer interposed therebetween. The conductive portion is also disposed on a second dielectric layer and faces at least a part of each of the plurality of second conductive columnar portions with the second dielectric layer interposed therebetween. A tip of each of the second conductive columnar portions is located closer to a first support portion than a tip of each of the first conductive columnar portions.

A capacitor is provided having a plurality of first conductive columnar portions that each have a nanosized outer diameter. Moreover, each of a plurality of second conductive columnar portions also have a nanosized outer diameter. A conductive portion is disposed on a first dielectric layer and faces at least a part of each of the plurality of first conductive columnar portions with the first dielectric layer interposed therebetween. The conductive portion is also disposed on a second dielectric layer and faces at least a part of each of the plurality of second conductive columnar portions with the second dielectric layer interposed therebetween. A tip of each of the second conductive columnar portions is located closer to a first support portion than a tip of each of the first conductive columnar portions.

A multilayer electronic component includes a body including dielectric layers and internal electrodes alternately disposed in a first direction, and external electrodes disposed on the body to be connected to the internal electrodes. At least one internal electrode of the internal electrodes includes a plurality of disconnected portions penetrating through a respective internal electrode. A disconnected portion of the plurality of disconnected portions includes at least one of a pore or a dielectric substance disposed to connect adjacent dielectric layers to each other. A dielectric filling ratio, defined as a ratio of an overall length of the dielectric substance to an overall length of the disconnected portion on a cross section in the third and first directions, is more than 20% to 80% or less.

A multilayer electronic component includes a body including dielectric layers and internal electrodes alternately disposed in a first direction, and external electrodes disposed on the body to be connected to the internal electrodes. At least one internal electrode of the internal electrodes includes a plurality of disconnected portions penetrating through a respective internal electrode. A disconnected portion of the plurality of disconnected portions includes at least one of a pore or a dielectric substance disposed to connect adjacent dielectric layers to each other. A dielectric filling ratio, defined as a ratio of an overall length of the dielectric substance to an overall length of the disconnected portion on a cross section in the third and first directions, is more than 20% to 80% or less.

The present invention provides a method of fabrication and device made by preparing a photosensitive glass substrate comprising at least silica, lithium oxide, aluminum oxide, and cerium oxide, masking a design layout comprising one or more holes or post to form one or more high surface area capacitive device for monolithic system level integration on a glass substrate.