Patent classifications
H01G4/206
THIN FILM CAPACITOR AND ELECTRONIC CIRCUIT SUBSTRATE HAVING THE SAME
To provide a thin film capacitor having high adhesion performance with respect to a circuit substrate. A thin film capacitor includes: a metal foil having a roughened upper surface; a dielectric film covering the upper surface of the metal foil and having an opening through which the metal foil is partly exposed; a first electrode layer contacting the metal foil through the opening; and a second electrode layer contacting the dielectric film without contacting the metal foil. The first and second electrode layers are formed in an area surrounded by an outer peripheral area of the upper surface of the metal foil so as not to cover the outer peripheral area. The outer peripheral area of the roughened upper surface of the metal foil is thus exposed, so that adhesion performance with respect to a circuit substrate can be enhanced.
THIN FILM CAPACITOR, ITS MANUFACTURING METHOD, AND ELECTRONIC CIRCUIT SUBSTRATE HAVING THE THIN FILM CAPACITOR
To provide a thin film capacitor in which a pair of terminal electrodes can be disposed on the same plane. A thin film capacitor includes a metal foil having a roughened upper surface, a dielectric film covering the upper surface of the metal foil and having an opening for partly exposing the metal foil therethrough, a first electrode layer contacting the metal foil through the opening, and a second electrode layer contacting the dielectric film without contacting the metal foil. With this configuration, both the first and second electrode layers can be disposed on the upper surface of the metal foil. In addition, since the metal foil is surface-roughened, a larger capacitance can be obtained.
THIN FILM CAPACITOR AND ELECTRONIC CIRCUIT SUBSTRATE HAVING THE SAME
To provide a thin film capacitor having high flexibility. A thin film capacitor includes: a metal foil having a roughened upper surface; a dielectric film covering the upper surface of the metal foil and having an opening through which the metal foil is partly exposed; a first electrode layer contacting the metal foil through the opening; and a second electrode layer contacting the dielectric film without contacting the metal foil. The particle diameter of crystal at a non-roughened center part of the metal foil is less than 15 μm in the planar direction and less than 5 μm in the thickness direction. This can not only enhance the flexibility of the metal foil to reduce a short-circuit failure in a state where the thin film capacitor is incorporated in a multilayer substrate but also enhance positional accuracy.
Multilayered dielectric composites for high temperature applications
The present document relates to multilayered dielectric composites for high-temperature applications and related methods.
Multilayer laminate and method for producing multilayer printed wiring board using same
A multi-layered board includes: a middle conductive layer; a first dielectric layer that is disposed directly on a first surface of the middle conductive layer; a second dielectric layer that is disposed directly on a second surface of the middle conductive layer; a first outer surface conductive layer that is disposed directly on an outer side of the first dielectric layer; and a second outer surface conductive layer that is disposed directly on an outer side of the second dielectric layer. The first outer surface conductive layer serves as a first outer surface of the multi-layered board, and the second outer surface conductive layer serves as a second outer surface of the multi-layered board. The middle conductive layer is solidly formed over an entire planar direction of the multi-layered board. The first dielectric layer and the second dielectric layer each independently have a thickness variation of 15% or less.
DIELECTRIC MATERIAL FOR A HIGH VOLTAGE CAPACITOR
A high voltage capacitor for a voltage divider is described that is configured to sense an elevated voltage for medium and high voltage electrical distribution networks. The high voltage capacitor comprises a high voltage electrode, a measurement electrode, and an dielectric material disposed between the high voltage and measurement electrodes, wherein the dielectric material consists essentially of lanthanum oxide-zirconium oxide-titanium oxide (LZT) glass filler disposed in an insulating polymer matrix such that the capacitance of the dielectric material does not vary by more than +/−0.5% in the temperature range of −20° C. to 60° C.
Gate-all-around fin device
A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.
Gate-all-around fin device
A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.
MULTILAYERED DIELECTRIC COMPOSITES FOR HIGH TEMPERATURE APPLICATIONS
The present document relates to multilayered dielectric composites for high-temperature applications and related methods.
Method for manufacturing metal/polymer hybrid nanoparticles with narrow size distribution by miniemulsion polymerisation
Method for manufacturing nanoparticles comprising a metallic core coated with a layer of polymer material comprising the following steps: a) preparing a water-in-oil emulsion comprising droplets of an aqueous phase, dispersed in an organic phase, b) adding nanoparticles comprising a metallic core coated with a shell of carbonaceous material, whereby nanoparticles trapped in the droplets are obtained, c) adding precursor monomers of the polymer material, and d) adding a polymerisation initiator, adding the precursor monomers and the polymerisation initiator resulting in polymerisation of the monomers, whereby nanoparticles coated with a layer of polymer material dispersed in the organic phase are obtained.