A substrate assembly includes: a substrate; a first transistor disposed on the substrate, wherein the first transistor includes a first semiconductor layer and the first semiconductor layer is a silicon semiconductor layer; and a second transistor disposed on the substrate, wherein the second transistor includes a second semiconductor layer and a drain electrode electrically connected to the second semiconductor layer, and the second semiconductor layer is an oxide semiconductor layer, wherein the first semiconductor layer of the first transistor is electrically insulated from the drain electrode of the second transistor.

A thin film transistor includes a gate, a gate insulating layer, an active layer, an ionized amorphous silicon layer, a source and a drain. The gate insulating layer covers the gate. The active layer is disposed on a side of the gate insulating layer away from the gate. The ionized amorphous silicon layer is disposed on a side of the active layer away from the gate, and the ionized amorphous silicon layer is in contact with the gate insulating layer. The source and the drain are disposed on a side of the ionized amorphous silicon layer away from the gate insulating layer, and the source and the drain are coupled to the active layer through the ionized amorphous silicon layer.

A thin film transistor array substrate and an electronic device including the thin film transistor array are disclosed. The thin film transistor comprises a substrate, a first active layer on the substrate, a gate electrode on the first active layer, a second active layer on the gate electrode such that the gate electrode is between the first active layer and the second active layer. The gate electrode is configured to drive the first active layer and the second active layer. Thereby, it is possible to provide the thin film transistor array substrate including one or more thin film transistors having high current characteristics in a small area, and the electronic device including the thin film transistor array substrate.

A semiconductor device including a first transistor, a second transistor, and an insulating layer is provided. The first transistor includes a first semiconductor layer and a first conductive layer. The second transistor includes a second semiconductor layer and a second conductive layer. The insulating layer includes a first side surface over the first conductive layer and a second side surface over the second conductive layer. A gate insulating layer includes a portion facing the first side surface with the first semiconductor layer therebetween and a portion facing the second side surface with the second semiconductor layer therebetween. A gate electrode includes a portion facing the first side surface with the gate insulating layer and the first semiconductor layer therebetween and a portion facing the second side surface with the gate insulating layer and the second semiconductor layer therebetween. The first semiconductor layer is electrically connected to the second semiconductor layer.

The disclosure discloses an array substrate and a preparation method thereof, a display panel and a display device. The array substrate includes: a substrate, and a first metal layer, a metal oxide layer and a second metal layer which are sequentially stacked and isolated from each other on the substrate; the first metal layer includes a light shading metal, a first electrode, and an anti-static line; the metal oxide layer includes a first active layer; the second metal layer includes a gate line and a second electrode; the gate line is connected with the anti-static line through a first TFT, one of the first electrode and the second electrode forms the source and drain electrodes of the first TFT, and the other forms the gate electrode of the first TFT; and the source is electrically connected with the gate line, and the drain is electrically connected with the anti-static line.

This disclosure provides an array substrate, a method for preparing the array substrate, and a display panel. The method includes: forming a first thin film transistor and a second thin film transistor on a base substrate. In the formation of an active layer of the first thin film transistor, by using an eutectic point of the catalyst particle and silicon, and a driving factor that the Gibbs free energy of amorphous silicon is greater than that of crystalline silicon (silicon-based nanowire), and due to absorption of the amorphous silicon by the molten catalyst particle to form a supersaturated silicon eutectoid, the silicon nucleates and grows into a silicon-based nanowire. Moreover, during the growth of the silicon-based nanowire, the amorphous silicon film grows linearly along guide structure under the action of the catalyst particle, thus obtaining a silicon-based nanowire with a high density and high uniformity.

A display panel and a display device are provided in the present disclosure. The display panel includes a base substrate, a first transistor, a second transistor, a pixel circuit, and a drive circuit. A first active layer of the first transistor includes silicon; and a second active layer of the second transistor includes an oxide semiconductor. A length of a channel region of the first transistor is LL a distance between a first gate electrode and the first active layer is D1, and a first area S1=L1×D1; and a length of a channel region of the second transistor is L2, a distance between a second gate electrode and the second active layer is D2, and a second area S2=L2×D2, where S1<S2. The second transistor is included in the drive circuit, and the first transistor is included in one of the pixel circuit and the drive circuit.

A semiconductor device including an oxide semiconductor in which on-state current is high is provided. The semiconductor device includes a first transistor provided in a driver circuit portion and a second transistor provided in a pixel portion; the first transistor and the second transistor have different structures. Furthermore, the first transistor and the second transistor are transistors having a top-gate structure. In an oxide semiconductor film of each of the transistors, an impurity element is contained in regions which do not overlap with a gate electrode. The regions of the oxide semiconductor film which contain the impurity element function as low-resistance regions. Furthermore, the regions of the oxide semiconductor film which contain the impurity element are in contact with a film containing hydrogen. The first transistor provided in the driver circuit portion includes two gate electrodes between which the oxide semiconductor film is provided.

A display device includes: a substrate; a semiconductor layer; a gate electrode overlapping the semiconductor layer; a common voltage line disposed on a same layer as the gate electrode; a common voltage line anti-oxidation layer disposed on the common voltage line; an interlayer insulating layer; source and drain electrodes disposed on the interlayer insulating layer; and a common voltage applying electrode disposed on a same layer as the source electrode and the drain electrode. The common voltage applying electrode is connected to the common voltage line through a first contact hole formed in the interlayer insulating layer, the common voltage line anti-oxidation layer includes an opening overlapping the common voltage line, the interlayer insulating layer is disposed in the opening, a width of the opening is smaller than a width of the common voltage line, and the first contact hole is disposed in the opening in a plan view.

According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer formed of silicon and positioned above the insulating substrate, a second semiconductor layer formed of a metal oxide and positioned above the first semiconductor layer, a first insulating film formed of a silicon nitride and positioned between the first semiconductor layer and the second semiconductor layer, and a block layer positioned between the first semiconductor film and the second semiconductor layer, the block layer hydrogen diffusion of which is lower than that of the first insulating film.