A method is provided for manufacturing a thin film transistor (TFT) backplate that includes a switch TFT and a drive TFT. The method is conducted such that each of the switch TFT and the drive TFT manufactured therewith includes a source electrode/a drain electrode and a gate electrode, and also includes an etching stopper layer, a semiconductor layer, and gate isolation layer that are disposed between the source electrode/the drain electrode and the gate electrode to form a TFT structure. The gate isolation layers of the switch TFT and drive TFT are formed of different materials, such as SiOx and Al.sub.2O.sub.3, or SiOx and SiNx, or Al.sub.2O.sub.3 and a mixture of SiNx and SiOx, such that electrical properties of the switch TFT and the drive TFT are made different.

A semiconductor device including a semiconductor layer, a first electrode, and a second electrode. The semiconductor layer includes a first source region, a first drain region, a second source region, and a second drain region connected to a channel region. The first gate electrode is disposed below the semiconductor layer. The first gate electrode is insulated from the semiconductor layer. The first gate electrode at least partially overlaps the shared channel region. The second gate electrode is disposed above the semiconductor layer. The second gate electrode is insulated by a second gate insulating layer. The second gate electrode at least partially overlaps the channel region.

An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si.

An array substrate and a display panel. The array substrate includes a thin film transistor array layer including a driving transistor, a switching transistor, and a capacitor. The driving transistor includes a first active layer, a first gate insulating layer, a first gate, and an insulating dielectric layer sequentially stacked. The switching transistor includes a second active layer, a second gate insulating layer, and a second gate sequentially stacked. The insulating dielectric layer and the second gate insulating layer are located at a same layer. A thickness of the first gate insulating layer is greater than a thickness of the second gate insulating layer. The capacitor includes a first electrode plate and a second electrode plate. The first electrode plate and the first gate are disposed on same layer, and the second electrode plate and the second gate are disposed on same layer.

An array substrate includes a base substrate, a light-shielding pattern, a buffer pattern, an active layer, a gate insulating layer and a first passivation layer provided with a first via, a second via and a third via, and a source and a drain. An entire orthographic projection of the active layer on the base substrate coincides with an orthographic projection of at least part of the buffer pattern on the base substrate. The orthographic projection of the buffer pattern on the base substrate is within a border of an orthographic projection of the light-shielding pattern on the base substrate, and its area is less than an area of the orthographic projection of the light-shielding pattern on the base substrate. One of the source and the drain is coupled to the active layer through the first via, and another one is coupled to the active layer through the second via and the light-shielding pattern through the third via.

A includes a switch TFT and a drive TFT. The switch TFT is formed of a first source and a first drain, a first gate, and a first etching stopper layer, and a first oxide semiconductor layer and first gate isolation layer sandwiched therebetween. The drive TFT is formed of a second source and a second drain, a second gate, and a second oxide semiconductor layer, and a first etching stopper layer and a second gate isolation layer sandwiched therebetween. The electrical properties of the switch TFT and the drive TFT are different. The switch TFT has a smaller subthreshold swing to achieve fast charge and discharge, and the drive TFT has a relatively larger subthreshold swing for controlling a current and a grey scale more precisely.

A display device includes a substrate; a gate insulating layer disposed on the substrate, a first gate electrode and a second gate electrode; a first active layer disposed on the gate insulating layer and comprising a polysilicon layer; a first insulating layer disposed on the first active layer and the gate insulating layer; a second active layer disposed on the first insulating layer and comprising a metal oxide layer; a first source electrode, a first drain electrode, a second source electrode and a second drain electrode, wherein the first source electrode and the first drain electrode are disposed on the first insulating layer and respectively electrically connect to the first active layer, and the second source electrode and the second drain electrode are disposed on the second active layer and electrically connect to the second active layer; and a display medium layer disposed on the substrate.

A display device, and method for manufacture, having a substrate; a first thin film transistor (TFT) on the substrate, the first TFT having a first active layer, a first gate insulator, and a first gate electrode; a second TFT on the substrate, the second TFT having a second active layer, a second gate insulator and a second gate electrode. The first gate insulator is disposed between the first gate electrode and the first active layer, and the first gate insulator is in contact with the first active layer. The second gate insulator is disposed between the second gate electrode and the second active layer, and the second gate insulator is in contact with the second active layer. A material of the first active layer is different than a material of the second active layer, and a hydrogen concentration of the second gate insulator is different from a hydrogen concentration of the first gate insulator.

A pulse converter circuit includes a logic circuit to which a first signal is input and from which a second signal is output. The logic circuit includes a p-channel transistor which determines whether a voltage of the second signal is set to a first voltage depending on a voltage of the gate; and an n-channel transistor which determines whether the voltage of the second signal is set to a second voltage, which is higher than the first voltage, depending on a voltage of the gate. The p-channel transistor includes a semiconductor layer containing an element of a group 14. The n-channel transistor includes an oxide semiconductor layer.

The present disclosure relates to a display device, an array substrate and a manufacturing method thereof, and relates to the technical field of display. The method includes steps of: providing a base substrate, and forming a semiconductor pattern, a gate insulation layer, a gate electrode, an insulation layer and a source/drain electrode on the base substrate, and further includes forming the composite material layer on the base substrate including the semiconductor pattern, and hydrotreating the composite material layer, in which the composite material layer may contain titanium complex-graphene oxide. The present disclosure is capable of omitting the interlayer insulation layer, thereby avoiding the situation that a flexible layer cannot be displayed due to the breakage of insulation layer between inorganic layers, thereby improving bending performance of the flexible screen.