A multilayer ceramic electronic component includes a multilayer body and an outer electrode on each end surfaces of the multilayer body. The outer electrode includes an underlying electrode layer and a plating layer on the underlying electrode layer. Void portions inside the underlying electrode layer are each filled with a barrier film. The barrier film is formed by an atomic layer deposition method.

An electrical device that includes: a substrate; an anodic porous oxide region above the substrate; a first capacitor electrode region arranged in the anodic porous oxide region, extending in the anodic porous oxide region, the first capacitor electrode region having a first wall perpendicular to the top surface; a second capacitor electrode region arranged in the anodic porous oxide region, extending in the anodic porous oxide region, the second capacitor electrode region having a second wall perpendicular to the top surface and facing the first wall of the first capacitor electrode region, the first wall of the first capacitor electrode region and the second wall of the second capacitor electrode region being separated by a dielectric portion comprising a part of the anodic porous oxide region.

A capacitor is disclosed. The capacitor includes a first metal layer, a second metal layer on the first metal layer, a ferroelectric layer on the second metal layer, and a third metal layer on the ferroelectric layer. The second metal layer includes a first non-reactive barrier metal and the third metal layer includes a second non-reactive barrier metal. A fourth metal layer is on the third metal layer.

A capacitor includes a lower electrode, an upper electrode, a dielectric film between the lower electrode and the upper electrode, and a leakage current reduction film between the upper electrode and the dielectric film. The leakage current reduction film includes a doped AlZrO film, wherein an ionic radius of a dopant contained in the doped AlZrO film is greater than or equal to about 130 picometers (pm).

A capacitor may comprise a substrate and a first electrically conductive electrode layer. A metal oxide layer may be deposited on at least one of the substrate or the first electrically conductive electrode layer. A proximal region of the metal oxide may comprise a stoichiometric, dielectric, oxygen vacancy-free portion of the metal oxide. The proximal region may be in communication with the first electrically conductive electrode layer. A distal region of the metal oxide may comprise a constant oxygen vacancy portion. The distal region may be in communication with a second electrically conductive electrode layer. The metal oxide may comprise a gradient region comprising a substantially stoichiometric metal oxide portion and a substantially constant oxygen vacancy portion. The gradient region may comprise an increasing oxygen vacancy gradient from the proximal region to the distal region. The second electrically conductive electrode layer may be deposited on the distal region.

A capacitor includes a lower electrode including a first metal material and having a first crystal size in a range of a few nanometers, a dielectric layer covering the lower electrode and having a second crystal size that is a value of a crystal expansion ratio times the first crystal size and an upper electrode including a second metal material and covering the dielectric layer. The upper electrode has a third crystal size smaller than the second crystal size.

A capacitor according to an embodiment of the present disclosure includes a substrate, a first electrode disposed on the substrate, a dielectric film disposed on the first electrode, a second electrode disposed on the dielectric film, a third electrode in contact with the second electrode in a first region of at least a portion of a lower surface of the third electrode, and an organic insulator film covering an upper portion of the dielectric film, an upper portion of the second electrode, and the third electrode. In a normal direction normal to an upper surface of the substrate, the organic insulator film is not disposed between the lower surface of the third electrode and the second electrode.

A semiconductor device includes a first electrode; a second electrode which is apart from the first electrode; and a dielectric layer between the first electrode and the second electrode. The dielectric layer may include a base material including an oxide of a base metal, the base material having a dielectric constant of about 20 to about 70, and co-dopants including a Group 3 element and a Group 5 element. The Group 3 element may include Sc, Y, B, Al, Ga, In, and/or Tl, and the Group 5 element may include V, Nb, Ta, N, P, As, Sb, and/or Bi.

A dielectric composition including a complex oxide containing bismuth, zinc, and niobium, includes a crystal phase formed of the complex oxide and having a pyrochlore type crystal structure, and an amorphous phase. When the complex oxide is represented by a composition formula Bi.sub.xZn.sub.yNb.sub.zO.sub.1.75+δ, in which x, y, and z satisfy relations of x+y+z=1.00, 0.20≤y≤0.50, and 2/3≤x/z≤3/2.

Embodiments of the present disclosure generally relate to methods of forming a capacitor for DRAM. The method begins by preparing a substrate for forming the capacitor. A bottom electrode is formed on the top surface of the substrate. A dielectric layer is formed in contact with the bottom electrode. The material of the dielectric layer is one of a barium titanate, BaTiO.sub.3 (BTO) strontium titanate, SrTiO.sub.3 (STO), barium strontium titanate, BaSrTiO.sub.3 (BSTO), ZrSTO, ZrBTO, or ZrBSTO. A top electrode is formed on the dielectric layer and then a cap is formed on the top electrode.