A display device includes conductive layers including wires and conductive patterns in a display area and a pad area, a via layer on the conductive layers, a first electrode and a second electrode on the via layer in the display area and spaced apart from each other, a first insulating layer on the first electrode and the second electrode, light emitting elements on the first electrode and the second electrode spaced apart from each other on the first insulating layer, and a first connection electrode on the first electrode and electrically contacting the light emitting elements, and a second connection electrode on the second electrode and electrically contacting the light emitting elements, each of the conductive layers includes a first metal layer and a second metal layer on the first metal layer, and the second metal layer contains copper and has a grain size of about 155 nm or less.

An interconnection structure includes a first dielectric layer, a first conductive feature, a first liner layer, a second conductive feature, a second liner layer, and an air gap. The first conductive feature is disposed in the first dielectric layer. The first liner layer is disposed between the first conductive feature and the first dielectric layer. The second conductive feature penetrates the first dielectric layer. The second liner layer is disposed between the second conductive feature and the first dielectric layer. The air gap is disposed in the first dielectric layer between the first liner layer and the second liner layer. The first liner layer and the second liner layer include metal oxide, metal nitride, or silicon oxide doped carbide.

The present application discloses a semiconductor device with a programmable unit and a method for fabricating the semiconductor device. The semiconductor device includes a substrate comprising a first region and a second region; a first semiconductor element positioned in the first region of the substrate; a second semiconductor element positioned in the first region of the substrate and electrically coupled to the first semiconductor element; and a programmable unit positioned in the second region and electrically connected to the first semiconductor element.

A semiconductor device package structure is provided. The semiconductor device package structure includes a substrate having a first layer over a second layer. The first layer may have greater thermal conductivity than the second layer. The semiconductor device package structure further includes one or more dies coupled to the substrate. A heat spreader may have a first section coupled to a first surface of a first die of the one or more dies, and a second section coupled to the first layer.

Density-graded adhesion layers on conductive structures within a microelectronic package substrate are described. An example is a density-graded adhesion layer that includes a dense region proximate to a conductive structure that is surrounded by a less dense (or porous) region adjacent to an overlying dielectric layer. Providing such a graded adhesion layer can have a number of benefits, which can include providing both mechanical connections for improved adhesion with a surrounding dielectric layer and provide hermetic protection for the underlying conductive structure from corrosive species. The adhesion layer enables the conductive structure to maintain its as-formed smooth surface which in turn reduces insertion loss of signals transmitted through the conductive structure.

A semiconductor device includes a porous dielectric layer including a recessed portion, a conductive layer formed in the recessed portion, and a cap layer formed on the porous dielectric layer and on the conductive layer in the recessed portion, an upper surface of the porous dielectric layer being exposed through a gap in the cap layer.

A semiconductor apparatus configured to decrease occurrence of exfoliation between a conductor layer and an insulator layer is provided. A first region containing silicon and copper is disposed between a first conductor portion and a first insulator portion. A second region containing silicon and copper is disposed between a second conductor portion and a second insulator portion. The first region has a maximum nitrogen concentration higher than that of the second region.

A method of forming a semiconductor structure includes forming a semiconductor device over a substrate, forming a combination of a connection-level dielectric layer and a connection-level metal interconnect structure over the semiconductor device, where the connection-level metal interconnect structure is electrically connected to a node of the semiconductor device and is embedded in the connection-level dielectric layer, forming a line-and-via-level dielectric layer over the connection-level dielectric layer, forming an integrated line-and-via cavity through the line-and-via-level dielectric layer over the connection-level metal interconnect structure, selectively growing a conductive via structure containing cobalt from a bottom of the via portion of the integrated line-and-via cavity without completely filling a line portion of the integrated line-and-via cavity, and forming a copper-based conductive line structure that contains copper at an atomic percentage that is greater than 90% in the line portion of the integrated line-and-via cavity on the conductive via structure.

A semiconductor structure includes a first dielectric material layer, a first metal interconnect structure embedded within the first dielectric material layer and including a first metallic material portion including a first metal, a second dielectric material layer located over the first dielectric material layer, and a second metal interconnect structure embedded within the second dielectric material layer and including an integrated line-and-via structure that includes a second metallic material portion including a second metal. A metal-semiconductor alloy portion including a first metal-semiconductor alloy of the first metal and a semiconductor material is located underneath the second metallic material portion, and contacts a top surface of the first metal interconnect structure.

To provide a wiring material which does not require a diffusion barrier layer and exhibits excellent conductivity and adhesion property between a conductor and an insulator and a semiconductor element using the same. The wiring structure of the present invention includes a conductor containing an intermetallic compound and an insulator layer. The intermetallic compound preferably contains two or more kinds of metal elements selected from the group consisting of Al, Fe, Co, Ni, and Zn. In addition, the intermetallic compound is preferably one or more kinds selected from an intermetallic compound containing Al and Co, an intermetallic compound containing Al and Fe, an intermetallic compound containing Al and Ni, an intermetallic compound containing Co and Fe, or an intermetallic compound containing Ni and Zn.