Disclosed is an electrostatic discharge protection device which includes a substrate including a first well having a first conductivity type and a second well surrounding the first well, first to fifth diffusion regions formed on the first well, and sixth and seventh diffusion regions formed on the second well. The second diffusion region surrounds the first diffusion region, the fourth diffusion region surrounds the fifth diffusion region, and the fifth diffusion region surrounds the second diffusion region and the fourth diffusion region. The sixth diffusion region surrounds the fifth diffusion region, and the seventh diffusion region surrounds the sixth diffusion region. The sixth and seventh diffusion regions are connected to an anode electrode, and the first to fifth diffusion regions are connected a cathode electrode.

A method of forming a HV lateral PNP BJT with a pulled back isolation structure and a polysilicon gate covering a part of the NW+HVNDDD base region and a part of the collector extension (HVPDDD) and the resulting device are provided. Embodiments include forming a DVNWELL in a portion of a p-sub; forming a HVPDDD in a portion of the DVNWELL; forming a LVPW in a portion of the HVPDDD; forming a first and a second NW laterally separated in a portion of the DVNWELL, the first and second NW being laterally separated from the HVPDDD; forming a N+ base, a P+ emitter, and a P+ collector in an upper portion of the first and second NW and LVPW, respectively; forming a STI structure between the P+ emitter and P+ collector in a portion of the DVNWELL, HVPDDD, and LVPW, respectively; and forming a SAB layer over the STI structure.

The invention provides a semiconductor device layout structure disposed in an active region. The semiconductor device layout structure includes a first well region having a first conduction type. A second well region having a second conduction type opposite the first conduction type is disposed adjacent to and enclosing the first well region. A first doped region having the second conduction type is disposed within the first well region. A second doped region having the second conduction type is disposed within the first well region. The second doped region is separated from and surrounds the first doped region. A third doped region having the second conduction type is disposed within the second well region.

A semiconductor device and a method of making the same is provided. The device includes a semiconductor substrate having a major surface and a back surface. The device also includes a bipolar transistor. The bipolar transistor has comprises a collector region located in the semiconductor substrate; a base region located within the collector region and positioned adjacent the major surface; an emitter region located within the base region and positioned adjacent the major surface; and a collector terminal located on the major surface of the semiconductor substrate. The collector terminal includes: a first electrically conductive part electrically connected to the collector region; an electrically resistive part electrically connected to the first electrically conductive part, and a second electrically conductive part for allowing an external electrical connection to be made the collector terminal. The second conductive part is electrically connected to the first conductive part via the resistive part.

Systems and methods are disclosed for integrating functional components of front-end modules for wireless radios. Front-end modules disclosed may be dual-band front-end modules for use in 802.11ac-compliant devices. In certain embodiments, integration of front-end module components on a single die is achieved by implementing a high-resistivity layer or substrate directly underneath, adjacent to, and/or supporting SiGe BiCMOS technology elements.

In a semiconductor device having a capacitive element, an increase in a leak current caused by the generation of a parasitic MOSFET is avoided by thinning the insulating film between the electrodes of the capacitive element and thickening the interlayer insulating film. The semiconductor device is provided with a capacitive element including a lower electrode formed on the main surface of the semiconductor substrate in the capacitive element region and an upper electrode formed just above the lower electrode through the silicon nitride film and an interlayer insulating film including a silicon oxide film, a silicon nitride film, and a silicon oxide film over the semiconductor substrate in a region different from the capacitive element region.

In a semiconductor device including a resistance element, an electrostatic protection element, including a parasitic bipolar transistor having the resistance element as a component, is provided. That is, instead of providing a dedicated electrostatic protection element in a semiconductor device, a function as an electrostatic protection element is also achieved by using a resistance element provided in a semiconductor device.