H01L2224/2908

Film-shaped firing material and film-shaped firing material with support sheet

The present invention provides a film-shaped firing material 1 including sinterable metal particles 10, and a binder component 20, in which a content of the sinterable metal particles 10 is in a range of 15% to 98% by mass, a content of the binder component 20 is in a range of 2% to 50% by mass, a tensile elasticity of the film-shaped firing material at 60° C. is in a range of 4.0 to 10.0 MPa, and a breaking elongation thereof at 60° C. is 500% or greater; and a film-shaped firing material with a support sheet including the film-shaped firing material 1 which contains sinterable metal particles and a binder component, and a support sheet 2 which is provided on at least one side of the film-shaped firing material, in which an adhesive force (a2) of the film-shaped firing material to the support sheet is smaller than an adhesive force (a1) of the film-shaped firing material to a semiconductor wafer, the adhesive force (a1) is 0.1 N/25 mm or greater, and the adhesive force (a2) is in a range of 0.1 N/25 mm to 0.5 N/25 mm.

BONDING MEMBER FOR SEMICONDUCTOR DEVICE
20230395550 · 2023-12-07 · ·

A bonding member 10 used for bonding a semiconductor device 20 and a substrate 30, the bonding member including: a thermal stress relieving layer 11 made of any of Ag, Cu, Au, and Al; a first Ag brazing material layer 12 containing Ag and Sn as main components and provided on a side of the thermal stress relieving layer to which the semiconductor device is bonded; a second Ag brazing material layer 13 containing Ag and Sn as main components and provided on a side of the thermal stress relieving layer to which the substrate is bonded; a first barrier layer 14 made of Ni and/or Ni alloy and provided between the thermal stress relieving layer and the first Ag brazing material layer; and a second barrier layer 15 made of Ni and/or Ni alloy and provided between the stress relieving layer and the second Ag brazing material layer, in which a thermal conductivity of the bonding member after a power cycle test is 200 W/m.Math.K or more.

SEMICONDUCTOR PACKAGES WITH AN INTERMETALLIC LAYER

A method of forming a semiconductor package. Implementations include forming on a die backside an intermediate metal layer having multiple sublayers, each including a metal selected from the group consisting of titanium, nickel, copper, silver, and combinations thereof. A tin layer is deposited onto the intermediate metal layer and is then reflowed with a silver layer of a substrate to form an intermetallic layer having a melting temperature above 260 degrees Celsius and including an intermetallic consisting of silver and tin and/or an intermetallic consisting of copper and tin. Another method of forming a semiconductor package includes forming a bump on each of a plurality of exposed pads of a top side of a die, each exposed pad surrounded by a passivation layer, each bump including an intermediate metal layer as described above and a tin layer coupled to the intermediate metal layer is reflowed to form an intermetallic layer.

METHOD OF FASTENING A SEMICONDUCTOR CHIP ON A LEAD FRAME, AND ELECTRONIC COMPONENT
20210327725 · 2021-10-21 ·

An electronic component includes a lead frame; a semiconductor chip arranged above the lead frame; and a connection layer sequence arranged between the lead frame and the semiconductor chip, wherein the connection layer sequence includes a first intermetallic layer including gold and indium or gold, indium and tin, a second intermetallic layer including indium and a titanium compound, indium and nickel, indium and platinum or indium and titanium, and a third intermetallic layer including indium and gold.

Semiconductor device and method of manufacturing a semiconductor device

According to an embodiment of a method described herein, a silicon carbide substrate is provided that includes a plurality of device regions. A front side metallization may be provided at a front side of the silicon carbide substrate. The method may further comprise providing an auxiliary structure at a backside of the silicon carbide substrate. The auxiliary structure includes a plurality of laterally separated metal portions. Each metal portion is in contact with one device region of the plurality of device regions.

Image sensor, image capturing system, and production method of image sensor
11122227 · 2021-09-14 · ·

There is provided an imaging device, an electronic apparatus including an imaging device, and an automotive vehicle including an electronic apparatus including an imaging device, including: a first substrate including a first set of photoelectric conversion units; a second substrate including a second set of photoelectric conversion units; and an insulating layer between the first substrate and the second substrate; where the insulating layer has a capability to reflect a first wavelength range of light and transmit a second wavelength range of light that is longer than the first wavelength range of light.

METAL JOINT, METAL JOINT PRODUCTION METHOD, SEMICONDUCTOR DEVICE, AND WAVE GUIDE PATH

Provided is a metal joint (5) including: a Ag—Cu—Zn layer (7); and Cu—Zn layers (6) joined to both surfaces of the Ag—Cu—Zn layer (7), wherein the Ag—Cu—Zn layer (7) has a composition in which a Cu component is 1 atm % or more and 10 atm % or less, a Zn component is 1 atm % or more and 40 atm % or less, and the balance is a Ag component with respect to the total 100 atm %, and wherein the Cu—Zn layers (6) have a composition in which a Zn component is 10 atm % or more and 40 atm % or less and the balance is a Cu component with respect to the total 100 atm %. It is therefore possible to obtain the metal joint (5), which is capable of joining metal base materials to each other without being limited to aluminum-based materials, and also have high mechanical strength.

Method of fastening a semiconductor chip on a lead frame, and electronic component
11094559 · 2021-08-17 · ·

A method of attaching a semiconductor chip on a lead frame includes A) providing a semiconductor chip, B) applying a solder metal layer sequence to the semiconductor chip, wherein the solder metal layer sequence includes a first metallic layer including indium or an indium-tin alloy, C) providing a lead frame, D) applying a metallization layer sequence to the lead frame, wherein the metallization layer sequence includes a fourth layer including indium and/or tin arranged above the lead frame and a third layer including gold arranged above the fourth layer, E) forming an intermetallic intermediate layer including gold and indium, gold and tin or gold, tin and indium, G) applying the semiconductor chip to the lead frame via the solder metal layer sequence and the intermetallic intermediate layer, and H) heating the arrangement produced in G) to attach the semiconductor chip to the lead frame.

SEMICONDUCTOR DEVICE

A semiconductor device includes a semiconductor chip made of a SiC substrate and having main electrodes on one surface and a rear surface, first and second heat sinks, respectively, disposed adjacent to the one surface and the rear surface, a terminal member interposed between the second heat sink and the semiconductor chip, and a plurality of bonding members disposed between the main electrodes, the first and second heat sinks, and the terminal member. The terminal member includes plural types of metal layers symmetrically layered in the plate thickness direction. The terminal member as a whole has a coefficient of linear expansion at least in a direction orthogonal to the plate thickness direction in a range larger than that of the semiconductor chip and smaller than that of the second heat sink.

SEMICONDUCTOR MODULE
20210257273 · 2021-08-19 ·

A semiconductor module includes a power element, a signal wiring, and a heat sink. The signal wiring is connected to a signal pad of the power element. The heat sink cools the power element. The power element has an active area provided by a portion where the signal pad is formed. The signal pad is thermally connected to the heat sink via the signal wiring.