An embodiment is a method including forming a first interconnect structure over a first substrate, the first interconnect structure comprising dielectric layers and metallization patterns therein, patterning the first interconnect structure to form a first opening, coating the first opening with a barrier layer, etching a second opening through the barrier layer and the exposed portion of the first substrate, depositing a liner in the first opening and the second opening, filling the first opening and the second opening with a conductive material, and thinning the first substrate to expose a portion of the conductive material in the second opening, the conductive material extending through the first interconnect structure and the first substrate forming a through substrate via.

An etching method includes: (a) etching a substrate including an etching target film and a mask formed on the etching target film to form a recess that reaches the etching target film; (b) forming a protective film having a thickness corresponding to one molecular layer on a surface of the recess using a first gas; (c) etching the etching target film with plasma generated from a second gas while leaving the protective film on a side wall of the recess; and (d) repeating (b) and (c).

A method including: a step of preparing a substrate that includes a first layer having a dicing region and a mark, and including a semiconductor layer, and a second layer including a metal film; a step of removing the metal film, to expose the semiconductor layer corresponding to a first region that corresponds to the mark; a step of smoothing a surface of the exposed semiconductor layer; a step of imaging the substrate, with a camera sensing predetermined electromagnetic waves, to detect a position of the mark through the semiconductor layer, and calculating a second region corresponding to the dicing region; and a step of removing the metal film, to expose the semiconductor layer corresponding to the second region. In the smoothing step, the surface of the semiconductor layer is smoothed so as to have a surface roughness of 1/4 or less of a wavelength of the predetermined electromagnetic waves.

Provided is a semiconductor device including: a substrate; an electrode layer provided on the substrate; a semiconductor chip being provided on the electrode layer, including a first side surface portion having a first angle with respect to a substrate surface of the substrate, and including a second side surface portion being provided below the first side surface portion and having a second angle smaller than the first angle with respect to the substrate surface; and a resin being provided around the electrode layer and the semiconductor chip and being in contact with the first side surface portion and the second side surface portion.

In a method of manufacturing a semiconductor device including a Fin FET, a fin structure extending in a first direction is formed over a substrate. An isolation insulating layer is formed over the substrate so that an upper portion of the fin structure is exposed from the isolation insulating layer. A gate structure extending in a second direction crossing the first direction is formed over a part of the fin structure. A fin mask layer is formed on sidewalls of a source/drain region of the fin structure. The source/drain region of the fin structure is recessed by a plasma etching process. An epitaxial source/drain structure is formed over the recessed fin structure. In the recessing the source/drain region of the fin structure, the plasma process comprises applying pulsed bias voltage and RF voltage with pulsed power.

An electronic component cleaning method including: a preparation step of preparing an electronic component having a first surface covered with a protective film, a second surface opposite to the first surface, a sidewall between the first and second surfaces, and an adhering matter adhering to the sidewall; and a sidewall cleaning step of cleaning the sidewall. The sidewall cleaning step includes a deposition step of depositing a first film on the protective film and a surface of the adhering matter, using a first plasma, and a removal step of removing the first film deposited on the surface of the adhering matter, together with at least part of the adhering matter, using a second plasma. In the sidewall cleaning step, the deposition step and the removal step are alternately repeated a plurality of times, so as to allow the protective film to continue to exist.

Atomic layer etching (ALE) processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which a substrate comprising a metal, metal oxide, metal nitride or metal oxynitride layer is contacted with an etch reactant comprising an vapor-phase N-substituted derivative of amine compound. In some embodiments the etch reactant reacts with the substrate surface to form volatile species including metal atoms from the substrate surface. In some embodiments a metal or metal nitride surface is oxidized as part of the ALE cycle. In some embodiments a substrate surface is contacted with a halide as part of the ALE cycle. In some embodiments a substrate surface is contacted with a plasma reactant as part of the ALE cycle.

A semiconductor device includes a semiconductor substrate having a first surface and a second surface opposing each other, and a side surface between the first and second surfaces, and including a device region on the first surface a wiring structure on the surface of the semiconductor substrate, and having a dielectric layer and a metal wiring in the dielectric layer and electrically connected to the device region, and an insulating material layer on a side surface of the wiring structure and having a side surface connected to the side surface of the semiconductor substrate. The side surface of the insulating material layer has a first wave-shaped pattern in which concave-convex portions are repeated in a direction of the wiring structure that is perpendicular to the semiconductor substrate, and the side surface of the semiconductor substrate has a second wave-shaped pattern in which concave-convex portions are repeated in the direction.

The present invention provides a method for plasma dicing a substrate. The method comprising providing a process chamber having a wall; providing a plasma source adjacent to the wall of the process chamber; providing a work piece support within the process chamber; placing the substrate onto a support film on a frame to form a work piece work piece; loading the work piece onto the work piece support; providing a clamping electrode for electrostatically clamping the work piece to the work piece support; providing a mechanical partition between the plasma source and the work piece; generating a plasma through the plasma source; and etching the work piece through the generated plasma.

A method is proposed of producing a semiconductor body with a trench. The semiconductor body comprises a substrate. The method comprising the step of etching the trench into the substrate using an etching mask. An oxide layer is formed at least on a sidewall of the trench by oxidation of the substrate. A passivation layer is formed on the oxide layer and the bottom of the trench. The passivation layer is removed from the bottom of the trench. Finally, a metallization layer is deposited into the trench.