Patent classifications
H01L21/30655
Methods for forming stacked layers and devices formed thereof
A method includes etching a semiconductor substrate to form a trench, with the semiconductor substrate having a sidewall facing the trench, and depositing a first semiconductor layer extending into the trench. The first semiconductor layer includes a first bottom portion at a bottom of the trench, and a first sidewall portion on the sidewall of the semiconductor substrate. The first sidewall portion is removed to reveal the sidewall of the semiconductor substrate. The method further includes depositing a second semiconductor layer extending into the trench, with the second semiconductor layer having a second bottom portion over the first bottom portion, and a second sidewall portion contacting the sidewall of the semiconductor substrate. The second sidewall portion is removed to reveal the sidewall of the semiconductor substrate.
PROTECTIVE FILM AGENT AND PROCESSING METHOD OF WORKPIECE
There is provided a protective film agent with which a workpiece is coated when the workpiece is processed. The protective film agent includes a water-soluble resin, a light absorbing agent having a flavone structure, a flavonol structure, or an isoflavone structure, and a solvent that dissolves the resin and the light absorbing agent.
SEMICONDUCTOR MANUFACTURING APPARATUS
A semiconductor manufacturing apparatus includes: a first storage container storing a first raw material and having a first container outlet; a reaction chamber; a first flow rate controller adjusting a flow rate of the first raw material transported from the first container outlet of the first storage container to the reaction chamber and having a first inlet and a first outlet; a first pipe connecting the first container outlet of the first storage container and the first inlet of the first flow rate controller to each other and having a first connection portion; a second pipe connecting the first outlet of the first flow rate controller and the reaction chamber to each other and having a second connection portion having a first flow path switching valve; a third pipe connected to the first pipe at the first connection portion and connected to the second pipe at the second connection portion; a first pump having a first intake port connected to a portion of the third pipe connected to the second connection portion, the first pump having a first exhaust port connected to a portion of the third pipe connected to the first connection portion and the first pump transporting the first raw material from the second pipe to the first pipe; and a second flow rate controller having a second inlet connected to a portion of the third pipe between the first connection portion and the first pump, the second inlet being connected to the first pump, the second flow rate controller having a second outlet connected to a portion of the third pipe between the first connection portion and the first pump, the second outlet being connected to the first connection portion and the second flow rate controller controlling the flow rate of the first raw material supplied from the first pump to the first flow rate controller.
ETCHING METHOD
An etching method of the invention includes: a resist pattern-forming step of forming a resist layer on a target object, the resist layer being formed of a resin, the resist layer having a resist pattern; an etching step of etching the target object via the resist layer having the resist pattern; and a resist protective film-forming step of forming a resist protective film on the resist layer. The etching step is repetitively carried out multiple times. After the etching steps are repetitively carried out multiple times, the resist protective film-forming step is carried out.
Conductive feature with non-uniform critical dimension and method of manufacturing the same
The present disclosure provides a semiconductor device, a semiconductor assembly and method of manufacturing the semiconductor assembly. The semiconductor device includes a substrate, a conductive feature in the substrate, an isolation liner between the substrate and the conductive feature, and a main component in the substrate. The conductive feature includes first to third blocks. The first block has a uniform first critical dimension, wherein the main component is disposed around the first block. The second block has a uniform second critical dimension greater than the first critical dimension. The third block is interposed between the first block and the second block and has varying third critical dimensions.
SUBSTRATE PROCESSING METHOD, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM
There is provided a technique that includes forming a modified film by supplying a modifying gas to modify an unmasked deposited film on a substrate; and removing the modified film, including supplying a removal gas activated by plasma and supplying a protective-film-forming gas at least at the same time.
SEMICONDUCTOR MANUFACTURING METHOD
The present application provides a method for manufacturing a semiconductor, comprising providing a substrate, on which a first, second and third dielectric layers are successively formed, the third dielectric layer having an initial opening; forming a first deposited layer which at least covers a side wall of the initial opening to form a first mask layer having a first opening; removing the second dielectric layer directly below the first opening to expose a side wall of the second dielectric layer; forming a second deposited layer which at least covers the side wall of the first opening and the exposed side wall of the second dielectric layer, to form a second mask layer having a second opening; removing the first dielectric layer directly below the second opening to expose the substrate; and removing the second mask layer, and forming a trench by etching the substrate.
Apparatus for processing substrate
An apparatus for processing a substrate is provided. The apparatus includes a chamber having at least one gas inlet and at least one gas outlet, a substrate support in the chamber, a plasma generator and a controller configured to cause (a) placing a substrate on the substrate support, the substrate including a target layer having a recess, (b) exposing the substrate to a silicon-containing precursor, thereby forming an adsorption layer on a sidewall of the recess, (c) generating a plasma from a gas mixture in the chamber, the gas mixture including an oxygen-containing gas and a halogen-containing gas, (d) exposing the substrate to the plasma, thereby forming a protection layer on the adsorption layer while etching a bottom of the recess and (e) repeating (b) to (d) in sequence.
CRYOGENIC ATOMIC LAYER ETCH WITH NOBLE GASES
The present disclosure generally relates to substrate processing methods, such as etching methods with noble gases at low temperatures. In an aspect, the method includes exposing a substrate, a first layer comprising a gas, and a fluorine-containing layer to energy to form a passivation layer while maintaining the substrate at conditions encompassing a triple point temperature of the gas, the substrate positioned in a processing region of a processing chamber. The method further includes etching the substrate with ions.
Semiconductor device including an insulating material layer with concave-convex portions
A semiconductor device includes a semiconductor substrate having a first surface and a second surface opposing each other, and a side surface between the first and second surfaces, and including a device region on the first surface a wiring structure on the surface of the semiconductor substrate, and having a dielectric layer and a metal wiring in the dielectric layer and electrically connected to the device region, and an insulating material layer on a side surface of the wiring structure and having a side surface connected to the side surface of the semiconductor substrate. The side surface of the insulating material layer has a first wave-shaped pattern in which concave-convex portions are repeated in a direction of the wiring structure that is perpendicular to the semiconductor substrate, and the side surface of the semiconductor substrate has a second wave-shaped pattern in which concave-convex portions are repeated in the direction.