There is provided a flexible electronic structure for bonding with an external circuit, comprising a flexible substrate, having a first surface, configured for bonding with the external circuit, and an opposing second surface, configured for engagement with a bonding tool, comprising at least one electronic component; at least one contact member, operatively coupled with said at least one electronic component and provided at said first surface of said flexible substrate, and adapted to operably interface with the external circuit after bonding, and at least one shield member, provided at said first surface so as to shieldingly overlap at least a portion of said at least one electronic component, adapted to withstand a predetermined pressure applied to said first surface and/or said opposing second surface during bonding with the external circuit.

There is provided a flexible electronic structure for bonding with an external circuit. The flexible electronic structure comprising: a flexible body having a first surface, the flexible body comprising at least one electronic component; at least one contact element configured to bond with the external circuit, the at least one contact element operatively coupled with the at least one electronic component and provided at the first surface of the flexible body, and arranged to operably interface with the external circuit after bonding, and at least one support element provided at the first surface of the flexible body, each support element arranged to contact a corresponding surface element disposed on a first surface of an external structure comprising the external circuit.

A packaged integrated circuit (IC) includes a leadframe including a die pad and leads around the die pad, an analog IC die having first bond pads on its active top side, and a second circuit including second circuit bond pads attached to the analog IC die by an attachment layer configured as a ring with a hollow center that provides an inner gap. A bottom side of the analog IC or the second circuit is attached to the die pad. Bond wires couple at least some of the first bond pads or some of the second circuit bond pads to the leads, and there is a second coupling between others of the second circuit bond pads and others of the first bond pads. A mold compound is for encapsulating the second circuit and the analog IC.

A semiconductor package includes a first substrate, a second substrate, a conductive component, an electronic component and a passive component. The conductive component is disposed between the first substrate and the second substrate, wherein the first substrate and the second substrate are separated from each other by an interval. The electronic component and the passive component are disposed within the interval.

An electronic package is provided, which is disposed with a second electronic component and a third electronic component on a first electronic component as a carrier structure, such that there is no need to match a layout size of the conventional package substrate. Therefore, the first electronic component can be designed as a System on a Chip (SoC) with a smaller size to improve the process yield.

A package including a package substrate; an interposer electrically coupled to the package substrate and including a metal layer; a die including an integrated voltage regulator and electrically coupled to the interposer by solder features; and an inductor formed by a magnetic material disposed between two of the solder features electrically coupled to each other by a portion of the metal layer of the interposer, the inductor electrically coupled to the integrated voltage regulator.

A package structure and a method of forming the same are provided. The package structure includes a package substrate, a semiconductor chip over the package substrate, and at least one integrated device integrated with the semiconductor chip. The integrated device is integrated directly beneath the semiconductor chip in order to facilitate signal transmission.

Wafer level passive array packages and modules are described. In an embodiment, a module includes a circuit board, and a package mounted on the circuit board in which the package includes a plurality of passive components bonded to a bottom side of the die and a plurality of landing pads of the circuit board.

Chip sealing designs to accommodate die-to-die communication are described. In an embodiment, a chip structure includes a split metallic seal structure including a lower metallic seal and an upper metallic seal with overlapping metallization layers, and a through seal interconnect navigating through the split metallic seal structure.

A semiconductor package may include a semiconductor chip mounted on a package substrate, and capacitors. The capacitors may be disposed between the package substrate and the first semiconductor chip, and the capacitors may support the first semiconductor chip.