Patent classifications
H
ELECTRICITY
Load children
H01
ELECTRIC ELEMENTS
Load children
H01L
SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
Load children
2224/00
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
Load children Filter patents View analytics View as hierarchy Open in page
H01L2224/01
Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
Load children Filter patents View analytics View as hierarchy Open in page
H01L2224/26
Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
Load children Filter patents View analytics View as hierarchy Open in page
H01L2224/31
Structure, shape, material or disposition of the layer connectors after the connecting process
Load children Filter patents View analytics View as hierarchy Open in page
H01L2224/32
of an individual layer connector
Load children Filter patents View analytics View as hierarchy Open in page
H01L2224/32151
the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
Load children Filter patents View analytics View as hierarchy Open in page
H01L2224/32221
the body and the item being stacked
Load children Filter patents View analytics View as hierarchy Open in page
H01L2224/32225
the item being non-metallic, e.g. insulating substrate with or without metallisation
Load children Filter patents View analytics View as hierarchy Open in page
H01L2224/32233
the layer connector connecting to a potential ring of the item
Filter patents View analytics View as hierarchy Open in page

H01L2224/32233

SEMICONDUCTOR PACKAGE INCLUDING PACKAGE SEAL RING AND METHODS FOR FORMING THE SAME
20220262695 · 2022-08-18 ·

A semiconductor package includes a first die; a second die stacked on the first die in a vertical direction; a dielectric encapsulation (DE) structure surrounding the first die and the second die in a lateral direction perpendicular to the vertical direction; and a package seal ring that extends through the DE structure and surrounds the second die and at least a portion of the first die, in the lateral direction.

Semiconductor package including package seal ring and methods for forming the same
12125761 · 2024-10-22 · ·

A semiconductor package includes a first die; a second die stacked on the first die in a vertical direction; a dielectric encapsulation (DE) structure surrounding the first die and the second die in a lateral direction perpendicular to the vertical direction; and a package seal ring that extends through the DE structure and surrounds the second die and at least a portion of the first die, in the lateral direction.