A lead frame structure of a light emitting diode includes a ceramic bed, a metal layer and a plastic seat. The metal layer has a first metal circuit area, a second metal circuit area, a gap dividing the first metal circuit area and the second metal circuit area, and a metal ring surrounding the first metal circuit area, the second metal circuit area and the gap. The plastic seat has a hollow function area. The first metal circuit area, the second metal circuit area and a part of the metal ring expose the function area to make the metal (circuit) layer of the function area has no gap to avoid excess glue. This can efficiently accomplish to increase intensity, quality and reliability of the packaged products.

A package which comprises a chip carrier made of a first material, a body made of a second material differing from the first material and being arranged on the chip carrier so as to form a cavity, a semiconductor chip arranged at least partially in the cavity, and a laminate encapsulating at least one of at least part of the chip carrier, at least part of the body and at least part of the semiconductor chip.

A method and structure for packaging a semiconductor device are provided. In an embodiment a first substrate is bonded to a second substrate, which is bonded to a third substrate. A thermal interface material is placed on the second substrate prior to application of an underfill material. A ring can be placed on the thermal interface material, and an underfill material is dispensed between the second substrate and the third substrate. By placing the thermal interface material and ring prior to the underfill material, the underfill material cannot interfere with the interface between the thermal interface material and the second substrate, and the thermal interface material and ring can act as a physical barrier to the underfill material, thereby preventing overflow.

Monolithic LED chips are disclosed comprising a plurality of active regions on a submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of the interconnect elements and active regions from other elements of the submount. The active regions are mounted in close proximity to one another with at least some of the active regions having a space between adjacent ones of the active regions that is 10 percent or less of the width of one or more of the active regions. The space is substantially not visible when the LED chip is emitting, such that the LED chips emits light similar to a filament.

A light-emitting device package includes a supporting substrate, a light-emitting device on the supporting substrate, an adhesive layer on at least a portion of a side surface or lower surface of the light-emitting device, the adhesive layer connecting the light-emitting device to the supporting substrate, and an air layer in a space defined by the supporting substrate, the light-emitting device, and the adhesive layer.

The disclosed embodiments of electronic packages include electrical contact pad features present on all sides of the package that facilitate simple and low cost electrical connections to the package made through a mechanical contacting scheme. In an embodiment, an electronic package comprises: a metal leadframe having a first leadframe portion having a first thickness and a second leadframe portion having a second thickness that is less than the first thickness, the second leadframe portion defining electrical contact pads; a silicon die attached to the second leadframe portion and overlying a space formed in the leadframe by the first and second leadframe portions; and wirebonds coupling the silicon die to the electrical contact pads. A method of fabricating the electronic package is also disclosed.

A process for forming a semiconductor package. The process comprises forming a first leadframe strip mounted upon an adhesive tape. The first leadframe strip is at least partially encased in a first mold compound thereby forming a molded leadframe strip. At least one flip chip semiconductor device is mounted on the molded leadframe strip. The semiconductor device has conductive masses attached thereon to effectuate electrical contact between the semiconductor device and the molded leadframe. The conductive masses can be substantially spherical or cylindrical. Liquid encapsulant is dispensed on the semiconductor device to encapsulate the flip chip semiconductor device. A cavity is formed between the semiconductor device and the molded leadframe. The molded leadframe strip, the semiconductor device, and the conductive masses are at least partially encased in a second mold compound. The second mold compound can be molded so that a surface of the flip chip semiconductor device that is not attached to the molded leadframe is substantially exposed or molded to produce a globular form on the flip chip semiconductor device. The molded leadframe strip is singulated to form discrete semiconductor packages.

A package structure is provided. The package structure includes a die, a lead frame, and a conductive glue. The lead frame includes a die pad and a retaining wall structure. The die pad is configured to support the die, and the retaining wall structure surrounds the die. The conductive glue is disposed between the die and the lead frame.

A semiconductor package structure and a method for manufacturing the same are provided. The semiconductor package structure includes a substrate, a chip and a dielectric structure. The substrate includes a first portion and a second portion surrounding the first portion. The second portion defines a cavity over the first portion. The chip includes a terminal on an upper surface of the chip. The dielectric structure fills the cavity and laterally encroaches over the upper surface of the chip. The dielectric structure is free from overlapping with the terminal of the chip.

A solid-state storage device includes a housing, a wiring board and a semiconductor package unit. The housing is formed with a heat-dissipating recess thereon. The wiring board is fixed in the housing. One side of the semiconductor package unit is mounted on the wiring board, and the other side of the semiconductor package unit is embedded in the heat-dissipating recess. A top surface and lateral surfaces surrounding the top surface of the semiconductor package unit are all thermally connected to the housing in the heat-dissipating recess.