Provided is a thin film transistor array substrate having at least one thin film transistor. The thin film transistor includes a semiconductor layer having a channel area with a first doping concentration on a substrate, a source-drain area disposed at opposite sides of the channel area and with a second doping concentration greater than the first doping concentration, and a substantially undoped area extending from the source-drain area. The substrate has a gate insulating layer on the semiconductor layer and a gate electrode disposed on the gate insulating layer and overlapping the channel area in at least some portions. The substrate has a source electrode and a drain electrode, each insulated from the gate electrode and electrically connected to the source-drain area. The gate electrode includes a first gate electrode layer and a second gate electrode layer, wherein the second gate electrode layer is thicker than the first gate electrode layer.

The present application discloses a thin film transistor. The thin film transistor includes a base substrate; an active layer; an etch stop layer on a side of the active layer distal to the base substrate; and a source electrode and a drain electrode on a side of the etch stop layer distal to the active layer. The active layer includes a channel region, a source electrode contact region, and a drain electrode contact region. An orthographic projection of the etch stop layer on the base substrate surrounds an orthographic projection of the drain electrode contact region on the base substrate. An orthographic projection of the source electrode contact region on the base substrate at least partially peripherally surrounding the orthographic projection of the etch stop layer on the base substrate.

In various embodiments, electronic devices such as touch-panel displays incorporate interconnects featuring a conductor layer and, disposed above the conductor layer, a capping layer comprising an alloy of Cu and one or more refractory metal elements selected from the group consisting of Ta, Nb, Mo, W, Zr, Hf, Re, Os, Ru, Rh, Ti, V, Cr, and Ni.

A display device includes: a substrate; a data line disposed on the substrate, the data line extending in a first direction; a gate insulating layer disposed on the data line; a gate line disposed on the gate insulating layer, the gate line extending in a second direction intersecting the first direction; a gate electrode protruding from the gate line; a thin film transistor connected to the gate line and the data line; and a first shielding electrode disposed on the same layer as a layer on which the gate line is disposed, the first shielding electrode overlapping the data line.

A method for fabricating at least a portion of a complementary circuit, such as a complementary inverter circuit, includes fabricating a first sheet and a second sheet. Each of the sheets includes metal layers, a dielectric layer, and a semiconductor channel layer, configured so as to form a plurality of transistors of a respective polarity (i.e., P-type for one sheet, N-type for the other). The method also includes placing a layer of conductive material, such as anisotropic conducting glue (ACG) or anisotropic conducting foil (ACF), on the first sheet, and bonding at least a portion of the second sheet to the first sheet such that the conductive material is disposed between and in contact with the top-most metal layers of the first and second sheets. Separately fabricating the two sheets of different polarity may improve yields and/or decrease costs as compared to fabricating both polarities on a single substrate.

A display device may include a light emitting element, a buffer layer, a gate insulation layer, and a switching element. A refractive index of the gate insulation layer may be equal to a refractive index of the buffer layer. The switching element may be electrically connected to the light emitting element and may include an active layer and a gate electrode. The active layer may be positioned between the buffer layer and the gate insulation layer and may directly contact at least one of the buffer layer and the gate insulation layer. The gate insulation layer may be positioned between the active layer and the gate electrode and may directly contact at least one of the active layer and the gate electrode.

According to one embodiment, a thin film transistor includes an oxide semiconductor layer provided above an insulating substrate and including a channel region between a source region and a drain region, a first insulating film provided in a region on the oxide semiconductor layer, which corresponds to the channel region, a gate electrode provided on the first insulating film, a first protective film provided on the oxide semiconductor layer, the first insulating film and the gate electrode, as an insulating film containing a metal, a second protective film provided on the first protective film and a third protective film provided on the second protective film, as an insulating film containing a metal.

The invention provides a display device and a method of manufacturing a thin film transistor. The method of manufacturing a thin film transistor comprises: (A) providing a substrate; (B) forming a light shielding layer on the substrate, and patterning the light shielding layer to form a patterned light shielding layer; (C) forming a buffer layer on the substrate; (D) forming a semiconductor layer on the substrate, and patterning the semiconductor layer to form a patterned semiconductor layer; (E) forming an insulating layer on the substrate; and (F) forming a conductive layer on the substrate, and patterning the conductive layer to form a patterned conductive layer; wherein the same mask is used for patterning the light shielding layer and the semiconductor layer. Photoelectric effect of the thin film transistor outside the display region can be effectively avoided, while reducing the number of masks in the production process.

An imaging device that does not need a lens is provided. The imaging device includes a first layer, a second layer, and a third layer. The second layer is positioned between the first layer and the third layer. The first layer includes a diffraction grating. The second layer includes a photoelectric conversion element. The third layer includes a transistor including an oxide semiconductor in an active layer.

A display panel comprises a first substrate, a second substrate, a display layer and transistors. One of the transistors includes a gate electrode disposed on the base plate, a first insulating layer disposed on the gate electrode, an active layer disposed on the first insulating layer, and a source electrode and a drain electrode disposed on the active layer, wherein the active layer includes a channel region between the source electrode and the drain electrode. At least one of the source and drain electrodes includes a first conductive layer disposed on the active layer, and a second conductive layer disposed on and contacting the first conductive layer, wherein the second conductive layer exposes a portion of top surface of the first conductive layer so that the first conductive layer possesses a first protrusion portion protruding from the edge of the second conductive layer and extending towards the channel region.