Patent classifications
H01L29/78675
Crystalline semiconductor layer formed in BEOL processes
A crystalline channel layer of a semiconductor material is formed in a backend process over a crystalline dielectric seed layer. A crystalline magnesium oxide MgO is formed over an amorphous inter-layer dielectric layer. The crystalline MgO provides physical link to the formation of a crystalline semiconductor layer thereover.
Drive backplane and display panel
A drive backplane and a display panel are provided, the drive backplane includes: a substrate; and an oxide thin film transistor arranged on the substrate, wherein the oxide thin film transistor includes: an oxide active layer; a first gate structure disposed on a side of the oxide active layer away from the substrate; and a second gate structure disposed between the oxide active layer and the substrate; wherein at least one of the first gate structure and the second gate structure comprises a plurality of gate electrodes spaced apart along a direction in which the oxide active layer extends.
Thin film transistor including crystallized semiconductor, display device including the same, manufacturing method of the same, and method for crystallizing semiconductor
A thin film transistor according to an exemplary embodiment includes: a substrate; a semiconductor layer disposed on the substrate and including a channel region, and an input region and an output region disposed on both sides of the channel region and doped with an impurity; a buffer layer disposed between the substrate and the semiconductor layer; a control electrode overlapping the semiconductor layer; a gate insulation layer disposed between the semiconductor layer and the control electrode; and an input electrode connected to the input region and an output electrode connected to the output region, wherein the semiconductor layer includes polysilicon and is crystallized by a blue laser scan.
Pixel circuit
Provided is a display device including a plurality of pixels at least one of which has a first transistor and a light-emitting element. The first transistor includes a gate electrode, a gate insulating film over the gate electrode, an oxide semiconductor film over the gate insulating film, and a first terminal and a second terminal electrically connected to the semiconductor film. The second terminal is electrically connected to the light-emitting element. A region in which the first terminal overlaps with the gate electrode can be smaller than a region in which the second terminal overlaps with the gate electrode.
Display device
Disclosed is a display device that with low power consumption. The display device includes a first thin film transistor having a polycrystalline semiconductor layer in an active area and a second thin film transistor having an oxide semiconductor layer in the active area, wherein at least one opening disposed in a bending area has the same depth as one of a plurality of contact holes disposed in the active area, whereby the opening and the contact holes are formed through the same process, and the process is therefore simplified, and wherein a high-potential supply line and a low-potential supply line are disposed so as to be spaced apart from each other in the horizontal direction, whereas a reference line and the low-potential supply line are disposed so as to overlap each other, thereby preventing signal lines from being shorted.
DISPLAY DEVICE
According to one embodiment, a display device includes first semiconductor layers crossing a first scanning line in a non-display area, the first semiconductor layers being a in number, second semiconductor layers crossing a second scanning line in the non-display area, the second semiconductor layers being b in number, and an insulating film disposed between the first and second semiconductor layers and the first and second scanning lines, wherein a and b are integers greater than or equal to 2, and a is different from b, and the first and second semiconductor layers are both entirely covered with the insulating film.
DISPLAY PANEL AND LIQUID CRYSTAL DISPLAY DEVICE
A display panel and a liquid crystal display device are provided by the present application. The display panel includes a thin film transistor, a data line, and a scanning line. The thin film transistor includes an active layer, and the active layer includes a first section extending along a length direction of the data line and overlapping the data line, wherein the first section is electrically connected to the data line; a second section extending along the length direction of the data line; and a third section connecting the first section and the second section and extending along a length direction of the scanning line and overlapping the scanning line.
MANUFACTURING METHOD FOR LIQUID CRYSTAL DISPLAY DEVICE
A LCD device having a large pixel holding capacitance includes opposedly facing first and second substrates, and liquid crystal between them. The first substrate includes a video signal line, a pixel electrode, a thin film transistor having a first electrode connected to the video signal line and a second electrode connected to the pixel electrode, a first silicon nitride film formed above the second electrode, an organic insulation film above the first silicon nitride film, a capacitance electrode above the organic insulation film, and a second silicon nitride film above the capacitance electrode and below the pixel electrode. A contact hole etched in both the first and second silicon nitride films connects the second electrode and the pixel electrode to each other. A holding capacitance is formed by the pixel electrode, the second silicon nitride film and the capacitance electrode.
Display Device
Disclosed is a display device that with low power consumption. The display device includes a first thin film transistor having a polycrystalline semiconductor layer in an active area and a second thin film transistor having an oxide semiconductor layer in the active area, wherein at least one opening disposed in a bending area has the same depth as one of a plurality of contact holes disposed in the active area, whereby the opening and the contact holes are formed through the same process, and the process is therefore simplified, and wherein a high-potential supply line and a low-potential supply line are disposed so as to be spaced apart from each other in the horizontal direction, whereas a reference line and the low-potential supply line are disposed so as to overlap each other, thereby preventing signal lines from being shorted.
MANUFACTURING APPARATUS AND MANUFACTURING METHOD USING THE SAME
A manufacturing apparatus and a manufacturing method are provided. A manufacturing apparatus includes a chamber, and a stage disposed in the chamber. The stage includes an upper surface on which a target substrate is disposed, a lower surface opposite to the upper surface, a first side surface extending between the upper surface and the lower surface in a first direction, and a second side surface extending between the upper surface and the lower surface in a second direction perpendicular to the first direction. The first side surface is in a round shape, and at least a portion of the first side surface is convex toward an outside of the stage.