An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes a terminal region. A testing electric circuit wiring is disposed in the terminal region. The testing electric circuit wiring includes a first metal layer, a second metal layer, and a third metal layer.

A display apparatus having a connection electrode which crosses a bending area may be provided. The connection electrode may be disposed on a device substrate including a bending area between a display area and a pad area. The connection electrode may connect the display area and the pad area across the bending area. The connection electrode may have a stacked structure of the lower connecting electrode and the upper connecting electrode. A light-emitting device, an encapsulating element and a touch electrode may be sequentially stacked on the display area of the device substrate. The upper connecting electrode may include the same material as the touch electrode. Thus, in the display apparatus, the disconnection of the connection electrode due to bending stress and external impact may be reduced.

An array substrate structure is provided, which includes a substrate with a first surface and a second surface opposite to the first surface. A first TFT is on the first surface of the substrate, and a second TFT is on the second surface of the substrate. A through via passes through the substrate, and the first TFT is electrically connected to the second TFT through the through via.

A semiconductor device include a substrate, a buffer layer formed on the substrate, a channel layer formed by an intrinsic polycrystalline silicon layer on the buffer layer, polycrystalline source and drain by non-intrinsic silicon formed on both sides of the polycrystalline silicon layer, a source electrode and a drain electrode formed on the polycrystalline source and the drain, a gate electrode corresponding to the channel layer, and an NiSi.sub.2 contact layer located between the source and the source electrode and between the drain and the drain electrode.

The invention provides a display device and a method of manufacturing a thin film transistor. The method of manufacturing a thin film transistor comprises: (A) providing a substrate; (B) forming a light shielding layer on the substrate, and patterning the light shielding layer to form a patterned light shielding layer; (C) forming a buffer layer on the substrate; (D) forming a semiconductor layer on the substrate, and patterning the semiconductor layer to form a patterned semiconductor layer; (E) forming an insulating layer on the substrate; and (F) forming a conductive layer on the substrate, and patterning the conductive layer to form a patterned conductive layer; wherein the same mask is used for patterning the light shielding layer and the semiconductor layer. Photoelectric effect of the thin film transistor outside the display region can be effectively avoided, while reducing the number of masks in the production process.

A display panel includes: a base substrate; a circuit layer on the base substrate; and a display element layer on the circuit layer, wherein the circuit layer includes an active layer on the base substrate and containing boron and fluorine; a control electrode on the active layer; and a control electrode insulation layer between the active layer and the control electrode, wherein the active layer includes: a core layer in which a concentration of the boron is greater than a concentration of the fluorine; and a surface layer on the core layer and in which a concentration of the fluorine is greater than a concentration of the boron.

It is an object of the invention to provide a technique to manufacture a display device with high image quality and high reliability at low cost with high yield. The invention has spacers over a pixel electrode layer in a pixel region and over an insulating layer functioning as a partition which covers the periphery of the pixel electrode layer. When forming a light emitting material over a pixel electrode layer, a mask for selective formation is supported by the spacers, thereby preventing the mask from contacting the pixel electrode layer due to a twist and deflection thereof. Accordingly, such damage as a crack by the mask does not occur in the pixel electrode layer. Thus, the pixel electrode layer does not have a defect in shapes, thereby a display device which performs a high resolution display with high reliability can be manufactured.

A display panel, an array substrate, and a manufacturing method thereof, wherein the array substrate includes a thin film transistor device, and an interface layer, a first transparent conductive layer, a passivation layer, and a second transparent conductive layer which are formed on the thin film transistor device in sequence. By replacing a planarization layer in the prior art with the interface layer, performing a gate re-etching process, and perforating the interface layer and the passivation layer to simultaneously form a deep via and a shallow via, a number of photomasks required to form the array substrate is reduced to 8. It effectively reduces costs of production materials and costs of photomasks.

Provided are an ultrasonic fingerprint identification circuit, a driving method thereof, and a display device. The ultrasonic fingerprint identification circuit comprises fingerprint identification units each including an ultrasonic fingerprint identification sensor connected to a first node; a control module connected to a composite signal line, a first control signal line and the first node and configured to provide a reset potential to the first node and to provide a pull-up potential to the first node in response to a first level provided by the composite signal line; a reading module connected to a second control signal line, the first node and a reading signal line, and configured to read a detection signal of the first node. The first control signal line connected to one fingerprint identification unit is reused as the second control signal line connected to another fingerprint identification unit.

A method for manufacturing a display substrate is provided. The method includes: forming a first active layer arranged in the NMOS transistor region and a second active layer arranged in the PMOS transistor region on the base substrate; coating one side, facing away from the base substrate, of the first active layer and one side, facing away from the base substrate, of the second active layer with a first photoresist layer, forming a first pattern layer by patterning the first photoresist layer to expose at least two ends of the first active layer; forming N-type heavily doped regions by performing N-type heavy doping on the two ends of the first active layer with the first pattern layer as a mask; forming a second pattern layer by processing the first pattern layer to expose at least a middle region of the first active layer.