To provide an electric component socket in which a pressing surface of a pressing member is prevented from contacting a contact pin when the socket is pressed by the pressing surface in a state where a first electric component is not housed in the socket. A pressing surface of a pressing mechanism contacts a first electric component when the pressing mechanism is moved downward in a state where the first electric component is housed in a plate. On the other hand, when the pressing mechanism is moved downward in a state where the first electric component is not housed in the plate, a push-up member is lifted up with the plate to push up the pressing surface. Therefore, the pressing surface is moved upward to prevent the pressing surface from contacting the contact pin.

This socket comprises: an accommodation part that has a recess portion; an opening/closing part that opens/closes the recess portion; and a rotation support part that supports the opening/closing part to be rotationally movable between an opened state and a closed state. The opening/closing part has: a cover that is supported by the rotation support part; a pressing part that is provided on the first direction side of the first end and presses a electronic component in the recess portion in the closed state; a locking part that is provided on the first direction side of the pressing part and locks the cover to the accommodation part in the closed state; and a pressed part that has a pressed surface and is provided, at a position farther away from the rotation support part than the locking part, to be rotationally movable.

An inspection device comprising: a first elastomer defining a hole; and a plunger overlapping with the first elastomer, wherein a conductive film is formed over an inner wall of the hole, and the plunger is electrically connected to the conductive film.

A pressurizing device for semiconductor testing includes a tension block, a first pusher block extending through the tension block, a base plate on the first pusher block, a second pusher block on the tension block and extending through the base plate, a first spring connected to each of the first pusher block and the second pusher block, a second spring connected to each of the tension block and the base plate, a press plate on the base plate, and a press shaft coupled to the press plate. The press shaft includes a shaft hole.

A testing apparatus for a semiconductor package includes a circuit board, testing patterns and a socket. The circuit board has a testing region and includes a plurality of testing contacts and a plurality of signal contacts distributed in the testing region. The testing patterns are embedded in the circuit board and electrically connected to the testing contacts, where each of the testing patterns includes a first conductive line and a second conductive line including a main portion and a branch portion connected to main portion. The first conductive line is connected to the main portion. The socket is located on the circuit board and comprising connectors electrically connected to the circuit board, wherein the connectors are configured to transmit electric signals for testing the semiconductor package from the testing apparatus.

The present disclosure relates to a device for carrying a chip, and a device and a method for testing a chip. The device for carrying a chip is configured to fasten chips of different sizes, and includes a support box and a plurality of first elastic snap rings. The support box is configured to carry a chip. A first connection terminal of the first elastic snap ring is provided on a first inner side wall of the support box, a second connection terminal of the first elastic snap ring is suspended, and is configured to be in contact with the chip and provide a pressure in a first direction for the chip because an elastic body of the first elastic snap ring is in an elastically compressed state.

A testing device and probe elements thereof are provided. The testing device includes a circuit substrate, a plurality of probe elements, a first housing and a second housing. The plurality of probe elements are independent of each other and arranged at fixed intervals. Each probe element comprises a body, a first contact section and a second contact section. The body is provided with a plurality of strip-shaped perforations, and the body includes a first lateral side and a second lateral side opposite to each other. The first contact section is connected to the first lateral side, and the second contact section is connected to the second lateral side. The extension direction of the first contact section relative to the body and the extension direction of the second contact section relative to the body are distinct from each other.

A method includes forming a plurality of dielectric layers, forming a plurality of redistribution lines in the plurality of dielectric layers, etching the plurality of dielectric layers to form an opening, filling the opening to form a through-dielectric via penetrating through the plurality of dielectric layers, forming a dielectric layer over the through-dielectric via and the plurality of dielectric layers, forming a plurality of bond pads in the dielectric layer, bonding a device die to the dielectric layer and a first portion of the plurality of bond pads through hybrid bonding, and bonding a die stack to through-silicon vias in the device die.

A chip testing board and a chip testing method are provided. The testing board includes a first conductive layer, a second conductive layer and a third conductive layer, wherein the first conductive layer is located on a substrate for electrical connection with a first power connection point of a chip, and one side of the first conductive layer leads to a first test point; the second conductive layer is located on the first conductive layer for electrical connection with a second power connection point of the chip, and one side of the second conductive layer leads to a second test point; and the third conductive layer is located on the second conductive layer for electrical connection with a third power connection point of the chip, and one side of the third conductive layer leads to a third test point.

Disclosed is a test socket supporting a probe. The test socket includes a socket block of an insulating material, provided with a probe hole to accommodate the probe, and a coating portion comprising an external film of a conductive material coated on an outer surface of the socket block, and an internal film of a conductive material coated on an inner surface of the probe hole, at least a portion of the internal film being electrically isolated from the external film.