A method for aligning a device includes: loading devices sequentially on an upper surface of a base plate having vacuum holes; suctioning the loaded device with vacuum pressure that allows minute movement of the loaded device, as the vacuum pressure is applied while the device is loaded on the base plate; moving an alignment vision assembly positioned above the base plate to the upper portion of the device to be aligned and then lowering the alignment vision assembly; checking a position of the device with a vision means through a through hole and an opening in a state, in which an alignment block surrounds the device, so as to inform a controller of the coordinates of the device; and aligning the device by finely moving the base plate in X-Y-θ directions according to the coordinates so that the device is guided to two surfaces of the opening.

A substrate support includes a supporting unit and a light irradiation mechanism. The supporting unit includes a plate member on which an inspection target is placed and a transparent member. The light irradiation mechanism is configured to irradiate light to increase a temperature of the inspection target. Each of the plate member and the transparent member is made of a low thermal expansion material having a linear expansion coefficient of 1.0×10.sup.−6/K or less.

The invention is a cost effective multisite parallel wafer tester that has an array of stationary wafer test sites; a single mobile wafer handling and alignment carriage that holds a wafer handling robot, a wafer rotation pre-alignment assembly, a wafer alignment assembly, a wafer front opening unified pod (FOUP), and a wafer camera assembly; and a robot that moves the wafer handling and alignment carriage to and from each test site. Each test site contains a wafer probe card assembly and a floating chuck. In use, wafers are loaded from a front opening FOUP into a wafer buffer FOUP from which wafers are retrieved by the wafer handling and alignment assembly. The robot positions the wafer handling and alignment carriage and the associated wafer handling robot, the wafer rotation pre-alignment assembly, the wafer alignment assembly, the wafer FOUP, and the wafer camera assembly in front of and inside a given test site and aligns the wafer to be tested with the probe card inside the test site using the floating chuck.

A semiconductor package test system includes a test pack on which a semiconductor package is loaded, and a semiconductor package testing apparatus. The semiconductor package testing apparatus includes a receiving section that receives the test pack. The receiving section includes a pack receiving slot into which the test pack is inserted. The test pack includes a chuck on which the semiconductor package is fixed, a probe block disposed above the chuck, and a connection terminal. The receiving section includes a receiving terminal that is electrically connected to the connection terminal when the receiving terminal contacts the connection terminal. The probe block includes at least one needle configured to be electrically connected to the semiconductor package disposed on the chuck upon the chuck moving toward the semiconductor package. The receiving section is provided in plural.

An apparatus for aligning a device having a fine pitch includes: a base plate, which has vacuum holes respectively formed at seating points for devices and suctions the devices with the vacuum pressure that allows minute movement as the vacuum pressure is applied in a state in which the devices are loaded; a jig plate, which is fixedly installed so as to be positioned on the upper portion of the base plate and has openings, in which the devices are received, in the same number as the number of the devices loaded on the base plate; and a base plate position adjusting means for finely moving the positions of the devices loaded on the base plate in X-Y-θ directions so as to position the devices in the openings (formed in the jig plate.

The present invention provides a probing system, which utilizes a suction nozzle to suck a wafer in probing. A relative distance between the suction nozzle and the probes can be adjusted according the conditions of the probing system, so the system extends the usage life.

Implementations of methods of making a semiconductor device may include: providing a partial semiconductor wafer. The method may also include providing a wafer holder including a tape portion with one or more openings through the tape portion. The method may include mounting the partial semiconductor wafer over the one or more openings in the tape portion of the wafer holder and providing an electrical connection to the partial semiconductor wafer through the one or more openings in the tape portion during probe test.

One example includes a cryogenic wafer test system. The system includes a first chamber that is cooled to a cryogenic temperature and a wafer chuck confined within the first chamber. The wafer chuck can be configured to accommodate a wafer device-under-test (DUT) comprising a plurality of superconducting die. The system also includes at least one wafer prober configured to implement a test on a superconducting die of the plurality of superconducting die via a plurality of electrical probe contacts. The system further includes a wafer chuck actuator system confined within a second chamber. The wafer chuck actuator system can be configured to provide at least one of translational and rotational motion of the wafer chuck to facilitate alignment and contact of a plurality of electrical contacts of the superconducting die to the respective plurality of electrical probe contacts of the at least one wafer prober.

Embodiments of the present application disclose a fixing device and fixing method for chip test and a chip tester. The fixing device for chip test includes: a carrier with a fixing chamber for fixing a chip formed inside, a plurality of adjustors being disposed on sidewalls of the fixing chamber and configured to be extended or retracted to adjust a position of the chip in two orthogonal directions within a horizontal plane; and a top cover configured to cooperate with the carrier to fix the chip in a vertical direction, wherein at least one adjustable pressing cover is disposed at a bottom of the top cover, so as to autonomously adjust a pressing force applied to the chip by the pressing cover in the vertical direction. The present application is suitable for fixing chips with various overall dimensions, and can adaptively adjust a pressing force.

One example includes a cryogenic wafer test system. The system includes a first chamber that is cooled to a cryogenic temperature and a wafer chuck confined within the first chamber. The wafer chuck can be configured to accommodate a wafer device-under-test (DUT) comprising a plurality of superconducting die. The system also includes a second chamber that is held at a non-cryogenic temperature and which comprises a wafer chuck actuator system configured to provide at least one of translational and rotational motion of the wafer chuck via mechanical linkage interconnecting the wafer chuck and the wafer chuck actuator system. The system further includes a radiation barrier arranged between the first chamber and the second chamber and through which the mechanical linkage extends, the radiation barrier being configured to provide a thermal gradient between the cryogenic temperature of the first chamber and the non-cryogenic temperature of the second chamber.