A testing holder for a chip unit, a multi site holding frame for plural chip units and a method for testing a die thereof are provided. The proposed multi site holding frame for testing plural chip units simultaneously includes a first holder frame having a plurality of testing holders. Each of the plurality of testing holders includes a holder body containing a specific one of the plural chip units, and a pressure releasing device formed on the holder body to release an insertion pressure when the specific one of the plural chip units is inserted in the holder body.

A test carrier that accommodates a DUT and includes a first flow passage through which fluid supplied from an outside of the test carrier flows.

An elevator unit for transferring a tray includes a tray guide block on which a tray is seated, a wrapping connector driving member configured to elevate and lower the tray guide block, a fixed fastener connected to the tray guide block, and a corrective fastener connected to the wrapping connector driving member and configured to rotatably coupled to the fixed fastening member.

A test handler comprising a primary rotary turret comprising pick heads for transporting electronic components, and a secondary rotary turret arranged and configured to receive electronic components directly or indirectly from the primary rotary turret, the secondary rotary turret including multiple separate test sectors having component carriers for carrying the electronic components received from the primary rotary turret, wherein the multiple test sectors are rotatably movable relative to one another. The test handler also comprises at least one testing device positioned along a periphery of the secondary rotary turret, wherein the component carriers of the respective test sectors are operative to convey the electronic components to a position of the at least one testing device for testing.

The invention is a cost effective multisite parallel wafer tester that has an array of stationary wafer test sites; a single mobile wafer handling and alignment carriage that holds a wafer handling robot, a wafer rotation pre-alignment assembly, a wafer alignment assembly, a wafer front opening unified pod (FOUP), and a wafer camera assembly; and a robot that moves the wafer handling and alignment carriage to and from each test site. Each test site contains a wafer probe card assembly and a floating chuck. In use, wafers are loaded from a front opening FOUP into a wafer buffer FOUP from which wafers are retrieved by the wafer handling and alignment assembly. The robot positions the wafer handling and alignment carriage and the associated wafer handling robot, the wafer rotation pre-alignment assembly, the wafer alignment assembly, the wafer FOUP, and the wafer camera assembly in front of and inside a given test site and aligns the wafer to be tested with the probe card inside the test site using the floating chuck.

A chip detection device, a chip detection system and a control method. The chip detection device includes a support plate (100), a probe holder (110) disposed on an upper part of the support plate (100), a detection platform, and a first driving device (120) connected to the probe holder (110). The chip detection system includes a cabinet (600), which is internally provided with a chip detection device, a controller, a loading manipulator (910), an unloading manipulator (920), a chip tray bracket (700) disposed on a side of the loading manipulator (910), and a distribution tray (800) disposed on a side of the unloading manipulator (920). According to the chip detection device, the chip detection system and the control method, during the rotation of the turntable (200), the filling, detection and classification of the chips are all controlled to be automatically completed under the control of an automatic control program, which greatly improves the efficiency of the chip detection.

A test carrier that accommodates a DUT and includes a first flow passage through which fluid supplied from an outside of the test carrier flows.

A tray elevator of a test handler includes a tray mounter on which a test tray is seated and having a support part and a through hole vertically penetrating the support part, a shaft vertically extending through the through hole of the tray mounter and configured to provide a path for elevating or lowering the tray mounter, a guide bushing including an outer surface and a groove at the outer surface, inserted into the through hole of the tray mounter, and configured to move along the shaft, and a ring inserted into the groove of the guide bushing.

A test carrier that accommodates a device under test (DUT) and has a through-hole facing the DUT, including: a movable valve that: opens by suction through the through hole such that the DUT is sucked through the through hole.

The present disclosure relates to a device for carrying a chip, and a device and a method for testing a chip. The device for carrying a chip is configured to fasten chips of different sizes, and includes a support box and a plurality of first elastic snap rings. The support box is configured to carry a chip. A first connection terminal of the first elastic snap ring is provided on a first inner side wall of the support box, a second connection terminal of the first elastic snap ring is suspended, and is configured to be in contact with the chip and provide a pressure in a first direction for the chip because an elastic body of the first elastic snap ring is in an elastically compressed state.