In an imaging method, a focal point of a focused optical beam is sequentially mechanically positioned at coarse locations in or on an integrated circuit (IC) wafer or chip. At each coarse location, a two-dimensional (2D) image or mapping tile is acquired by steering the focal point to fine locations on or in the IC wafer or chip using electronic beam steering and, with the focal point positioned at each fine location, acquiring an output signal produced in response to an electrical charge that is optically injected into the IC wafer or chip at the fine location by the focused optical beam. The 2D image or mapping tiles are combined, including stitching together overlapping 2D image or mapping tiles, to generate an image or mapping of the IC wafer or chip. The electronic beam steering may be performed using a galvo mirror. The set of coarse locations may span a three-dimensional (3D) volume.

An illuminator system for semiconductor chip testing has a rotary plate and a first light source and second light source mounted on the rotary plate. A controller is configured to rotate the rotary plate to provide a desired light output. A light output of the illuminator system is aligned to the desired first or second light source. A first semiconductor chip receives illumination from the desired source. The rotary plate is rotated until the desired light source is aligned to the light output. A quality or characteristic of light emitted by the first light source can be measured, and then the first light source can be adjusted, or an alert can be generated, if the quality or characteristic falls outside of a preconfigured range.

An illuminator system for semiconductor chip testing has a rotary plate and a first light source and second light source mounted on the rotary plate. A controller is configured to rotate the rotary plate to provide a desired light output. A light output of the illuminator system is aligned to the desired first or second light source. A first semiconductor chip receives illumination from the desired source. The rotary plate is rotated until the desired light source is aligned to the light output. A quality or characteristic of light emitted by the first light source can be measured, and then the first light source can be adjusted, or an alert can be generated, if the quality or characteristic falls outside of a preconfigured range.

A pyramid structure to mitigate optical probing attacks in ICs by scrambling the measurements reflected by a laser pulse is disclosed. The pyramid structure is applied to selected areas at the bottom surface of the metal traces in metal layer to circumvent the extra silicon layer and thus minimize the changes to the conventional device structures. The pyramid structure includes randomized pyramids at nanometer scale. Optical simulation results show the pyramidized metal surface is able to prevent optical probing attacks. The fabrication of pyramids is CMOS compatible as well. Optical simulations are performed to analyze the impact these nano-scaled pyramids in a laser voltage probing attacking model. The nanopyramid can disturb the optical measurements enough to make the attacks practically infeasible. In addition, the nanopyramid structure countermeasure works in a passive mode without consuming any energy.

The present disclosure provides a chip detection method and a chip detection apparatus. The chip detection method includes: providing a chip to be tested, the chip including a power pump region, and the power pump region including a plurality of power pump structures; detecting a dim light signal emitted from the power pump region when the chip is in a preset working mode; and determining whether the dim light signal matches a corresponding power pump working mode in the preset working mode, and if not, confirming that the power pump region has a defect, the power pump working mode including a working state of the power pump structures in the power pump region.

The present disclosure provides a chip detection method and a chip detection apparatus. The chip detection method includes: providing a chip to be tested, the chip including a power pump region, and the power pump region including a plurality of power pump structures; detecting a dim light signal emitted from the power pump region when the chip is in a preset working mode; and determining whether the dim light signal matches a corresponding power pump working mode in the preset working mode, and if not, confirming that the power pump region has a defect, the power pump working mode including a working state of the power pump structures in the power pump region.

An embodiment optical circuit wafer includes a plurality of unit sections formed on a wafer. The plurality of unit sections are formed in each of first dies, second dies, and third dies. Further, each of the plurality of unit sections includes electrical pads formed in a common layout. Further, each of the plurality of unit sections includes optical input/output ports formed in a common layout. The input/output ports are, for example, grating couplers. Further, each of the plurality of unit sections includes optical circuits. The optical circuits have different circuit structures from one another.

An inspection device includes a reference signal output section, a noise removal section, and an electrical characteristic measurement section. The reference signal output section is connected to an external power supply device in electrical parallel with a semiconductor sample, and outputs a reference signal according to the output of the external power supply device. The noise removal section outputs a noise removal signal obtained by removing a noise component of the output of the external power supply device from the current signal output from the semiconductor sample based on the reference signal. The electrical characteristic measurement section measures the electrical characteristic of the semiconductor sample based on the noise removal signal. The inspection device measures the electrical characteristic of the semiconductor sample to which a voltage is being applied by the external power supply device and which is being irradiated and scanned with light. The inspection device outputs a defective portion of the semiconductor sample based on the electrical characteristic.

An inspection device includes a reference signal output section, a noise removal section, and an electrical characteristic measurement section. The reference signal output section is connected to an external power supply device in electrical parallel with a semiconductor sample, and outputs a reference signal according to the output of the external power supply device. The noise removal section outputs a noise removal signal obtained by removing a noise component of the output of the external power supply device from the current signal output from the semiconductor sample based on the reference signal. The electrical characteristic measurement section measures the electrical characteristic of the semiconductor sample based on the noise removal signal. The inspection device measures the electrical characteristic of the semiconductor sample to which a voltage is being applied by the external power supply device and which is being irradiated and scanned with light. The inspection device outputs a defective portion of the semiconductor sample based on the electrical characteristic.

Methods and systems for automated testing of extremely-high frequency devices are disclosed. A device under test (DUT) is set in a simultaneous transmit and receive mode. The DUT receives a lower frequency radio frequency (RF) signal from a test unit and up-converts the lower frequency RF signal to a higher frequency RF signal. The DUT transmits the higher frequency RF signal using a first antenna, and receives the higher frequency RF signal using a second antenna. The DUT down-converts the received higher frequency RF signal to a received test RF signal and provides the received test RF signal to the test unit for comparing measurements derived from the received test signal to a design specification for the DUT.