When a bias voltage of a substrate is generated, an output voltage of a charge pump is controlled at an appropriate level, resultingly reducing a consumption current. The charge pump generates a predetermined output voltage from a predetermined DC power supply. A clock generator outputs a clock for operating the charge pump. A voltage monitoring unit monitors the output voltage of the charge pump and controls the clock output from the clock generator such that the output voltage is maintained within a predetermined range. A voltage regulator generates the bias voltage from the output voltage of the charge pump.

An input node is configured to receive a supply signal which may be of a first polarity or a second polarity opposite the first polarity. A high input current circuit couples the input node to an output node through at least one power transistor having a control electrode. A low input current circuit couples a supply current from the input node to control circuit configured to control the power transistor. A circuit is provided to detect polarity reversal with respect to the supply signal. A protection circuit for the low input current circuit operates to decouple the control circuit from the input node if the supply signal has the second polarity. A protection circuit for the high input current circuit operates to short-circuit the control electrode of the power transistor to the current path provided by the power transistor between the input node and the output node.

A bandgap reference circuit includes a bandgap reference core circuit that includes a first bipolar transistor having a first emitter current density and a first base-emitter voltage, a second bipolar transistor having a second emitter current density that is smaller than the first emitter current density and having a second base-emitter voltage, a resistor that is connected to the emitter of the second bipolar transistor, and a differential amplifier circuit that is configured to control first and second emitter currents through the first and second bipolar transistors, respectively, such that a sum of the second base-emitter voltage and a voltage drop across the resistor approximates the first base-emitter voltage. The bandgap reference circuit further includes a first replica bipolar transistor that emulates an operating point of the first bipolar transistor and a second replica bipolar transistor that emulates an operating point of the second bipolar transistor.

This document describes a start-up circuit for a self-biasing generator providing a reference voltage or a reference current, the start-up circuit comprising: an impedance circuit; means for coupling, in response to a start-up signal input to the start-up circuit, the impedance circuit to a bias voltage line of a current mirror circuit of the self-biasing generator, thereby inducing current to flow in the self-biasing generator and starting the self-biasing generator; a bypass current source coupled to the current mirror circuit and to the impedance, wherein the bypass current source is configured to be driven by a current in the current mirror circuit and to supply current to the impedance in proportion to the current in the current mirror circuit, thereby limiting the current induced to the self-biasing generator by the start-up circuit.

Apparatus and methods are disclosed for providing a bias, comprising a bias generator circuit including a high voltage (HV) circuit configured to generate a regulated high voltage (HV) from an HV line and provide the regulated HV at an HV regulated line and a low voltage (LV) circuit configured to generate a low voltage (LV) differential from the HV line and to provide the LV differential at an LV line.

An electronic device is disclosed. The electronic device includes: a first doped region of a first doping type arranged in a first semiconductor layer of a second doping type complementary to the first doping type; an insulation layer formed on top of the first semiconductor layer and adjoining the first doped region; at least two active device regions arranged in a second semiconductor layer formed on top of the insulation layer; and an electrical connection between one of the at least two active device regions and the first doped region. Each of the at least two active device regions is arranged adjacent to the first doped region and separated from the first doped region by the insulation layer.

Described is a new partial power converter (PPC) for the DC-DC stage of rapid-charging stations for electric vehicles (EV). The proposed converter manages only a fraction of the total power delivered from the grid to the battery, which increases the general efficiency of the system and the power density while potentially reducing the cost of the charger. The proposed topology is based on a switched capacitor between the AC terminals of a bridge converter H and does not require high-frequency isolation transformers in order to provide a source of controllable voltage between the CC link and the battery. The proposed concept can be implemented by using interposed power cells, which can improve energy quality, reduce the size of the inductor, and allow scalability for chargers of higher nominal power.

The present invention discloses a bias compensation circuit. The bias compensation circuit includes a detecting circuit, including a diode-connected transistor circuit, with a first end for receiving a first current, and a second end coupled to a first reference voltage end; and a first diode circuit, with a first end for receiving a second current, and a second end coupled to the first reference voltage end; wherein the detecting circuit provides a first voltage level according to the diode-connected transistor circuit, and provides a second voltage level according to the first diode circuit; a voltage-current converting circuit, coupled to the detecting circuit, for generating a first reference current according to the first voltage level and the second voltage level; and a bias circuit, coupled to the voltage-current converting circuit, for receiving the first reference current, to provide a bias voltage level according to the first reference current.

The present invention discloses a bias compensation circuit. The bias compensation circuit includes a detecting circuit, including a diode-connected transistor circuit, with a first end for receiving a first current, and a second end coupled to a first reference voltage end; and a first diode circuit, with a first end for receiving a second current, and a second end coupled to the first reference voltage end; wherein the detecting circuit provides a first voltage level according to the diode-connected transistor circuit, and provides a second voltage level according to the first diode circuit; a voltage-current converting circuit, coupled to the detecting circuit, for generating a first reference current according to the first voltage level and the second voltage level; and a bias circuit, coupled to the voltage-current converting circuit, for receiving the first reference current, to provide a bias voltage level according to the first reference current.

A current reference which includes a tracking voltage generator including a flipped gate transistor, a first transistor connected with the flipped gate transistor in a Vgs subtractive arrangement, an output node providing a tracking voltage which has a positive or negative temperature dependency based on the flipped gate transistor and the first transistor, and a second transistor connected to the output node; an amplifier to receive the tracking voltage and output an amplified signal; a control transistor to receive the amplified signal; a control resistor connected in series with the control transistor; and a current mirror to receive and mirror a reference current to at least one external device, the current mirror including mirroring pairs having a corresponding mirroring resistor coupled in series with a corresponding mirroring transistor, the mirroring resistor of at least one of the mirroring pairs having a serpentine structure.