H01L21/02351

Method for manufacturing semiconductor structure with enlarged volumes of source-drain regions

A method for smoothing a surface of a semiconductor portion is disclosed. In the method, an intentional oxide layer is formed on the surface of the semiconductor portion, a treated layer is formed in the semiconductor portion and inwardly of the intentional oxide layer, and then, the intentional oxide layer and the treated layer are removed to obtain a smoothed surface. The method may also be used for widening a recess in a manufacturing process for a semiconductor structure.

METHODS, APPARATUS, AND SYSTEMS FOR MAINTAINING FILM MODULUS WITHIN A PREDETERMINED MODULUS RANGE
20230022359 · 2023-01-26 ·

Embodiments of the present disclosure generally relate to methods, apparatus, and systems for maintaining film modulus within a predetermined modulus range. In one implementation, a method of processing substrates includes introducing one or more processing gases to a processing volume of a processing chamber, and depositing a film on a substrate supported on a substrate support disposed in the processing volume. The method includes supplying simultaneously a first radiofrequency (RF) power and a second RF power to one or more bias electrodes of the substrate support. The first RF power includes a first RF frequency and the second RF power includes a second RF frequency that is less than the first RF frequency. A modulus of the film is maintained within a predetermined modulus range.

System and method for radical and thermal processing of substrates

The present disclosure provides systems and methods for processing channel structures of substrates that include positioning the substrate in a first processing chamber having a first processing volume being in fluid communication with a plasma source. The substrate can include a channel structure with high aspect ratio features having aspect ratios greater than about 20:1. The method can also include forming an oxide cap layer over a silicon-containing layer of the channel structure and exposing the oxide cap layer to a hydrogen-or-deuterium radical to nucleate the silicon-containing layer of the channel structures of the substrate. Forming the oxide cap layer and exposing the channel structure with the hydrogen radical occurs in the first processing chamber to form a nucleated substrate. The method can also include positioning the nucleated substrate in a second processing chamber with a second processing volume and heating the nucleated substrate in the second processing chamber.

METHODS AND APPARATUS FOR CURING DIELECTRIC MATERIAL

Methods and apparatus for forming an integrated circuit structure, comprising: delivering a process gas to a process volume of a process chamber; applying low frequency RF power to an electrode formed from a high secondary electron emission coefficient material disposed in the process volume; generating a plasma comprising ions in the process volume; bombarding the electrode with the ions to cause the electrode to emit electrons and form an electron beam; and contacting a dielectric material with the electron beam to cure the dielectric material, wherein the dielectric material is a flowable chemical vapor deposition product. In embodiments, the curing stabilizes the dielectric material by reducing the oxygen content and increasing the nitrogen content of the dielectric material.

Gate Structure Fabrication Techniques for Reducing Gate Structure Warpage

Gate fabrication techniques are disclosed herein for providing gate stacks and/or gate structures (e.g., high-k/metal gates) with improved profiles (e.g., minimal to no warping, bending, bowing, and necking and/or substantially vertical sidewalls), which may be implemented in various device types. For example, gate fabrication techniques disclosed herein provide gate stacks with stress-treated glue layers having a residual stress that is less than about 1.0 gigapascals (GPa) (e.g., about -2.5 GPa to about 0.8 GPa). In some embodiments, a stress-treated glue layer is provided by depositing a glue layer over a work function layer and performing a stress reduction treatment, such as an ion implantation process and/or an annealing process in a gas ambient, on the glue layer. In some embodiments, a stress-treated glue layer is provided by forming at least one glue sublayer/metal layer pair over a work function layer, performing a poisoning process, and forming a glue sublayer over the pair.

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

A semiconductor device includes: a first conductivity type drift region having crystal defects generated by electron-beam irradiation; a first main electrode region of a first conductivity type arranged in the drift region and having an impurity concentration higher than that of the drift region; and a second main electrode region of a second conductivity type arranged in the drift region to be separated from the first main electrode region, wherein the crystal defects contain a first composite defect implemented by a vacancy and oxygen and a second composite defect implemented by carbon and oxygen, and a density of the crystal defects is set so that a peak signal intensity of a level of the first composite defect identified by a deep-level transient spectroscopy measurement is five times or more than a peak signal intensity of a level of the second composite defect.

SILICON COMPOUNDS AND METHODS FOR DEPOSITING FILMS USING SAME

A chemical vapor deposition method for producing a dielectric film, the method comprising: providing a substrate into a reaction chamber; introducing gaseous reagents into the reaction chamber wherein the gaseous reagents comprise a silicon precursor comprising an silicon compound having Formula I as defined herein and applying energy to the gaseous reagents in the reaction chamber to induce reaction of the gaseous reagents to deposit a film on the substrate. The film as deposited is suitable for its intended use without an optional additional cure step applied to the as-deposited film.

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
20210398806 · 2021-12-23 ·

A method of manufacturing a semiconductor device includes: forming, on or above a GaN-based semiconductor layer, an electron beam resist containing chlorine; forming, in the electron beam resist, a first opening that exposes a portion of a surface of the semiconductor layer; forming a film of a shrink agent that covers a sidewall surface of the first opening; and forming, in a state in which the sidewall surface is covered by the film of the shrink agent, a Ni film that contacts the semiconductor layer through the first opening.

Techniques and apparatus for anisotropic stress compensation in substrates using ion implantation

A method may include providing a substrate, where the substrate includes a first main surface and a second main surface, opposite the first main surface. The second main surface may include a stress compensation layer. The method may include directing ions to the stress compensation layer in an ion implant procedure. The ion implant procedure may include exposing a first region of the stress compensation layer to a first implant process, wherein a second region of the stress compensation layer is not exposed to the first implant process.

Precursors and flowable CVD methods for making low-k films to fill surface features

A method for depositing a silicon-containing film, the method comprising: placing a substrate comprising at least one surface feature into a flowable CVD reactor; introducing into the reactor at least one silicon-containing compound and at least one multifunctional organoamine compound to at least partially react the at least one silicon-containing compound to form a flowable liquid oligomer wherein the flowable liquid oligomer forms a silicon oxide coating on the substrate and at least partially fills at least a portion of the at least one surface feature. Once cured, the silicon carbonitride coating has excellent mechanical properties.