Provided are a method of manufacturing a multi-component semiconductor nanocrystal, a multi-component semiconductor nanocrystal manufactured by the method, and a quantum dot including the same. The method includes irradiating microwaves to a semiconductor nanocrystal synthesis composition, and the semiconductor nanocrystal synthesis composition includes a precursor including a Group I element, a precursor including a Group II element, a precursor including a Group III element, a precursor including a Group V element, a precursor including a Group VI element, or any combination thereof.

A new class of compounds known as chalcogenosilacyclopentanes is described. These compounds are five-membered ring structures containing a silicon-selenium or silicon-tellurium bond, as shown in Formulas (I) and (II). In these compounds, the substituents on the silicon and on the ring carbons may be hydrogen, alkyl, alkoxy, aromatic, or ether groups. The chalcogenosilacyclopentane compounds undergo ring-opening reactions with hydroxyl and other protic functionalities and may be used to prepare substrates that are amenable to thin film deposition techniques such as ALD and CVD. ##STR00001##

A new class of compounds known as chalcogenosilacyclopentanes is described. These compounds are five-membered ring structures containing a silicon-selenium or silicon-tellurium bond, as shown in Formulas (I) and (II). In these compounds, the substituents on the silicon and on the ring carbons may be hydrogen, alkyl, alkoxy, aromatic, or ether groups. The chalcogenosilacyclopentane compounds undergo ring-opening reactions with hydroxyl and other protic functionalities and may be used to prepare substrates that are amenable to thin film deposition techniques such as ALD and CVD.

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A method includes forming a 2-D material semiconductor layer over a substrate; forming source/drain electrodes covering opposite sides of the 2-D material semiconductor layer, while leaving a portion of the 2-D material semiconductor layer exposed by the source/drain electrodes; forming a first gate dielectric layer over the portion of the 2-D material semiconductor layer by using a physical deposition process; forming a second gate dielectric layer over the first gate dielectric layer by using a chemical deposition process, in which a thickness of the first gate dielectric layer is less than a thickness of the second gate dielectric layer; and forming a gate electrode over the second gate dielectric layer.

Integrated circuit interconnect structures including an interconnect line metallization feature subjected to one or more chalcogenation techniques to form a cap may reduce line resistance. A top portion of a bulk line material may be advantageously crystallized into a metal chalcogenide cap with exceptionally large crystal structure. Accordingly, chalcogenation of a top portion of a bulk material can lower scattering resistance of an interconnect line relative to alternatives where the bulk material is capped with an alternative material, such as an amorphous dielectric or a fine grained metallic or graphitic material.

A method for manufacturing a CZTS based thin film having a dual band gap slope, comprising the steps of: forming a Cu.sub.2ZnSnS.sub.4 thin film layer; forming a Cu.sub.2ZnSn(S,Se).sub.4 thin film layer; and forming a Cu.sub.2ZnSnS.sub.4 thin film layer. A method for manufacturing a CZTS based solar cell having a dual band gap slope according to another aspect of the present invention comprises the steps of: forming a back contact; and forming a CZTS based thin film layer on the back contact by the method described above.

Disclosed herein are compositions and methods for making polycrystalline thin films having very large grains sizes and exhibiting improved properties over existing thin films.

A method for producing an ohmic contact for an electronic part, wherein a layer consisting of a semiconductor is applied to a substrate is disclosed. A surface to be contacted of the applied semiconductor is wet-chemically etched, which is rinsed with radicals. An electrical conductor or a semiconductor is applied to the surface rinsed with radicals. An electronic component having several semiconductor layers on a substrate is also disclosed. A top layer on the one or more semiconductor layers is applied to the substrate. The top layer consists of an electrically non-conductive dielectric having an access through the top layer to a semiconductor layer, wherein adjacent semiconductor layers consist of different II-VI semiconductors. The access is at least partially filled with a II-VI semiconductor. A metallic contact applied to the II-VI semiconductor extends to the outer side of the top layer or projects outwardly relative to the top layer.

Disclosed herein are methods for exfoliation of single crystals allowing for growth of high crystalline quality on the exfoliated surfaces for III-V photovoltaics. Also disclosed herein are methods for growing GaAs (111) on layered-2D Bi.sub.2Se.sub.3 (0001) substrates in an MOCVD reactor.

A method of making a photovoltaic cell includes providing a metal oxide substrate. The substrate is at least translucent to light. The substrate is directed through a deposition chamber. A semiconductor is deposited over a first major surface of the substrate. The semiconductor includes a polycrystalline p-type layer. The semiconductor is exposed to a chlorine-containing compound or a chlorine molecule. A second electrode layer is provided over the semiconductor.