H01L21/0256

Optimized Heteroepitaxial Growth of Semiconductors
20230033788 · 2023-02-02 ·

A method of performing heteroepitaxy comprises exposing a substrate to a carrier gas, a first precursor gas, a Group II/III element, and a second precursor gas, to form a heteroepitaxial growth of one of GaAs, AlAs, InAs, GaP, InP, ZnSe, GaSe, CdSe, InSe, ZnTe, CdTe, GaTe, HgTe, GaSb, InSb, AlSb, CdS, GaN, and AlN on the substrate; wherein the substrate comprises one of GaAs, AlAs, InAs, GaP, InP, ZnSe, GaSe, CdSe, InSe, ZnTe, CdTe, GaTe, HgTe, GaSb, InSb, AlSb, CdS, GaN, and AlN; wherein the carrier gas is Hz, wherein the first precursor is HCl, the Group II/III element comprises at least one of Zn, Cd, Hg, Al, Ga, and In; and wherein the second precursor is one of AsH.sub.3 (arsine), PH.sub.3 (phosphine), H.sub.2Se (hydrogen selenide), H.sub.2Te (hydrogen telluride), SbH.sub.3 (hydrogen antimonide), H.sub.2S (hydrogen sulfide), and NH.sub.3 (ammonia). The process may be an HVPE (hydride vapor phase epitaxy) process.

METHOD TO DEPOSIT THIN FILM HIGH QUALITY ABSORBER LAYER

The present invention proposes a method to form a CdSeTe thin film with a defined amount of selenium and with a high quality. The method comprises the steps of providing a base substrate and of depositing a partial CdSeTe layer on a first portion of the base substrate. The step of depositing a partial CdSeTe layer is performed at least twice, wherein a predetermined time period without deposition of a partial CdSeTe layer on the first portion of the base substrate is provided between two subsequent steps of depositing a partial CdSeTe layer. The temperature of the base substrate and the CdSeTe layer already deposited on the first portion of the base substrate is controlled during the predetermined time period such that re-evaporation of Cd and/or Te from the CdSeTe layer already deposited takes place.

Passivated nanoparticles
11656231 · 2023-05-23 · ·

Passivated semiconductor nanoparticles and methods for the fabrication and use of passivated semiconductor nanoparticles is provided herein.

Optimized heteroepitaxial growth of semiconductors

A method of performing heteroepitaxy comprises exposing a substrate to a carrier gas, a first precursor gas, a Group II/III element, and a second precursor gas, to form a heteroepitaxial growth of one of GaAs, AlAs, InAs, GaP, InP, ZnSe, GaSe, CdSe, InSe, ZnTe, CdTe, GaTe, HgTe, GaSb, InSb, AlSb, CdS, GaN, and AlN on the substrate; wherein the substrate comprises one of GaAs, AlAs, InAs, GaP, InP, ZnSe, GaSe, CdSe, InSe, ZnTe, CdTe, GaTe, HgTe, GaSb, InSb, AlSb, CdS, GaN, and AlN; wherein the carrier gas is H.sub.2, wherein the first precursor is HCl, the Group II/III element comprises at least one of Zn, Cd, Hg, Al, Ga, and In; and wherein the second precursor is one of AsH.sub.3 (arsine), PH.sub.3 (phosphine), H.sub.2Se (hydrogen selenide), H.sub.2Te (hydrogen telluride), SbH.sub.3 (hydrogen antimonide), H.sub.2S (hydrogen sulfide), and NH.sub.3 (ammonia). The process may be an HVPE (hydride vapor phase epitaxy) process.

ALLOYED SEMICONDUCTOR NANOCRYSTALS
20230207723 · 2023-06-29 ·

The invention relates to methods for preparing 3-element semiconductor nanocrystals of the formula WYxZ(1-x), wherein W is a Group II element, Y and Z are different Group VI elements, and 0<X<1, comprising dissolving a Group II element, a first Group VI element, and a second Group VI element in a one or more solvents. The Group II, VI and VI elements are combined to provide a II:VI:VI SCN precursor solution, which is heated to a temperature sufficient to produce semiconductor nanocrystals of the formula WYxZ(1-x). The solvent used to dissolve the Group II element comprises octadecene and a fatty acid. The solvent used to dissolve the Group VI elements comprises octadecene. The invention also includes semiconductor nanocrystals prepared according to the disclosed methods, as well as methods of using the semiconductor nanocrystals.

METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR SUBSTRATE, METHOD FOR MANUFACTURING COMBINED SEMICONDUCTOR SUBSTRATE, COMBINED SEMICONDUCTOR SUBSTRATE, AND SEMICONDUCTOR-JOINED SUBSTRATE

A method for manufacturing a semiconductor substrate according to the present invention includes preparing a seed substrate containing a semiconductor material, forming an ion implanted layer at a certain depth from a front surface of a main surface of the seed substrate by implanting ions into the seed substrate, growing a semiconductor layer on the main surface of the seed substrate with a vapor-phase synthesis method, and separating a semiconductor substrate including the semiconductor layer and a part of the seed substrate by irradiating the front surface of the main surface of at least any of the semiconductor layer and the seed substrate with light.

Method of making quantum dots
09850593 · 2017-12-26 · ·

Quantum dots and methods of making quantum dots are provided.

Method for dissolving chalcogen elements and metal chalcogenides in non-hazardous solvents

The present disclosure provides a method of preparing a chalcogen containing solution that is hydrazine free and hydrazinium free, wherein the method comprises: providing a predetermined amount of elemental chalcogen; providing a predetermined amount of elemental sulfur; providing an amine solvent; and combining the predetermined amount of elemental chalcogen and the predetermined amount of elemental sulfur in the amine solvent, thereby dissolving the elemental chalcogen and the elemental sulfur in the amine solvent. The chalcogen containing solution can advantageously be used as a precursor for the formation of a chalcogen containing layer on a substrate.

INTEGRATED CIRCUIT DIE HAVING REDUCED DEFECT GROUP III-NITRIDE LAYER AND METHODS ASSOCIATED THEREWITH

Embodiments of the present disclosure are directed towards an integrated circuit (IC) die. In embodiments, an IC die may include a semiconductor substrate, a group III-Nitride or II-VI wurtzite layer disposed over the semiconductor substrate, and a plurality of buffer structures at least partially embedded in the group III-Nitride or II-VI wurtzite layer. In some embodiments, each of the plurality of buffer structures may include a central member disposed over the semiconductor substrate, a lower lateral member disposed over the semiconductor substrate and extending laterally away from the central member, and an upper lateral member disposed over the central member and extending laterally from the central member in an opposite direction from the lower lateral member. The plurality of buffer structures may be positioned in a staggered arrangement to terminate defects of the group III-Nitride or II-VI wurtzite layer. Other embodiments may be described and/or claimed.

Synthesis and use of precursors for ALD of tellurium and selenium thin films

Atomic layer deposition (ALD) processes for forming Te-containing thin films, such as Sb—Te, Ge—Te, Ge—Sb—Te, Bi—Te, and Zn—Te thin films are provided. ALD processes are also provided for forming Se-containing thin films, such as Sb—Se, Ge—Se, Ge—Sb—Se, Bi—Se, and Zn—Se thin films are also provided. Te and Se precursors of the formula (Te,Se)(SiR.sup.1R.sup.2R.sup.3).sub.2 are preferably used, wherein R.sup.1, R.sup.2, and R.sup.3 are alkyl groups. Methods are also provided for synthesizing these Te and Se precursors. Methods are also provided for using the Te and Se thin films in phase change memory devices.