A method includes forming a fin protruding from a semiconductor substrate; forming a dummy gate stack over the fin, wherein forming the dummy gate stack includes depositing a layer of amorphous material over the fin; performing an anneal process on the layer of amorphous material, wherein the anneal process recrystallizes the layer of amorphous material into a layer of polycrystalline material, wherein the anneal process includes heating the layer of amorphous material for less than one millisecond; and patterning the layer of polycrystalline material; and forming an epitaxial source/drain region in the fin adjacent the dummy gate stack; and removing the dummy gate stack and replacing the dummy gate stack with a replacement gate stack.

A thin film transistor includes an active layer including a first portion having a first thickness and a second portion having a second thickness greater than the first thickness, a capping layer filling a thickness difference between the first portion and the second portion and arranged on the first portion, a gate insulating layer arranged on the capping layer, a gate electrode on the active layer, wherein the gate insulating layer and the capping layer are disposed between the gate electrode and the active layer, and a source electrode and a drain electrode connected to the active layer.

A manufacturing method of a display apparatus including preparing a substrate, forming an amorphous silicon layer on the substrate, cleaning the amorphous silicon layer with hydrofluoric acid, crystallizing the amorphous silicon layer into a polycrystalline silicon layer, and forming a metal layer directly on the polycrystalline silicon layer.

A semiconductor device includes a semiconductor substrate, a semiconductor fin extending from the semiconductor substrate, a gate structure extending across the semiconductor fin, and source/drain semiconductor layers on opposite sides of the gate structure. The source/drain semiconductor layers each have a first thickness over a top side of the semiconductor fin and a second thickness over a lateral side of the semiconductor fin. The first thickness and the second thickness have a difference smaller than about 20 percent of the first thickness.

A laser light source is provided including an airtight container. A first resonance mirror and a second resonance mirror are disposed outside the airtight container. The first resonance mirror includes a lens unit and a reflection coating layer. The lens unit includes a first surface and a second surface, and the first surface is inclined with respect to the second surface.

Provided are a laser annealing apparatus and a method of manufacturing a substrate having a poly-Si layer using the laser annealing apparatus. The laser annealing apparatus includes a laser beam source that emits a linearly polarized laser beam, a polygon mirror that rotates around a rotation axis and reflects the laser beam emitted from the laser beam source, a first Kerr cell disposed on a laser beam path between the laser beam source and the polygon mirror, and a first optical element that directs the laser beam reflected by the polygon mirror toward an amorphous Si layer where the laser beam is irradiated upon the amorphous Si layer.

Provided is a physical quantity sensor including: a movable body; a base body; and a lid body, in which the movable body is accommodated in a space between the base body and the lid body, the space is sealed with a melt portion obtained by melting a through hole provided in the lid body, the lid body and the melt portion contain silicon, and the melt portion has a continuous curved surface having unevenness.

A method includes forming a first protruding fin and a second protruding fin over a base structure, with a trench located between the first protruding fin and the second protruding fin, depositing a trench-filling material extending into the trench, and performing a laser reflow process on the trench-filling material. In the reflow process, the trench-filling material has a temperature higher than a first melting point of the trench-filling material, and lower than a second melting point of the first protruding fin and the second protruding fin. After the laser reflow process, the trench-filling material is solidified. The method further includes patterning the trench-filling material, with a remaining portion of the trench-filling material forming a part of a gate stack, and forming a source/drain region on a side of the gate stack.

An exemplary device includes a channel layer, a first epitaxial source/drain feature, and a second epitaxial source/drain feature disposed over a substrate. The channel layer is disposed between the first epitaxial source/drain feature and the second epitaxial source/drain feature. A metal gate is disposed between the first epitaxial source/drain feature and the second epitaxial source/drain feature. The metal gate is disposed over and physically contacts at least two sides of the channel layer. A source/drain contact is disposed over the first epitaxial source/drain feature. A doped crystalline semiconductor layer, such as a gallium-doped crystalline germanium layer, is disposed between the first epitaxial source/drain feature and the source/drain contact. The doped crystalline semiconductor layer is disposed over and physically contacts at least two sides of the first epitaxial source/drain feature. In some embodiments, the doped crystalline semiconductor layer has a contact resistivity that is less than about 1×10.sup.−9 Ω-cm.sup.2.

A light emitting display device includes: a light emitting element; a second transistor connected to a scan line; a first transistor which applies a current to the light emitting element; a capacitor connected to a gate electrode of the first transistor; and a third transistor connected to an output electrode of the first transistor and the gate electrode of the first transistor. Channels of the second transistor, the first transistor, and the third transistor are disposed in a polycrystalline semiconductor layer, and a width of a channel of the third transistor is in a range of about 1 μm to about 2 μm, and a length of the channel of the third transistor is in a range of about 1 μm to about 2.5 μm.