Patent classifications
H
ELECTRICITY
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H01
ELECTRIC ELEMENTS
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H01L
SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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21/00
Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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H01L21/02
Manufacture or treatment of semiconductor devices or of parts thereof
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H01L21/04
the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
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H01L21/18
the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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H01L21/30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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H01L21/31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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H01L21/316
composed of oxides or glassy oxides or oxide based glass
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H01L21/31654
of semiconductor materials, e.g. the body itself
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H01L21/31658
by thermal oxidation, e.g. of SiGe
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H01L21/31658

Nanowire and method of fabricating the same
09735235 · 2017-08-15 · ·

A method of forming a nanowire includes providing a substrate. The substrate is etched to form at least one fin. Subsequently, a first epitaxial layer is formed on an upper portion of the fin. Later, an undercut is formed on a middle portion the fin. A second epitaxial layer is formed to fill into the undercut. Finally, the fin, the first epitaxial layer and the second epitaxial layer are oxidized to condense the first epitaxial layer and the second epitaxial layer into a germanium-containing nanowire.